用prim算法實(shí)驗(yàn)最小生成樹 本程序中用到函數(shù)adjg( )，此函數(shù)作用是通過接受輸入的點(diǎn)數(shù)和邊數(shù)，建立無向圖。函數(shù)prg( )用于計(jì)算并輸出無向圖的鄰接矩陣。函數(shù)prim( )則用PRIM算法來尋找無向圖的最小生成樹 定義了兩個(gè)數(shù)組lowcost[max],closest[max]，若頂點(diǎn)k加入U(xiǎn)中，則令lowcost[k]=0。 定義二維數(shù)組g[ ][ ]來建立無向圖的鄰接矩陣。
標(biāo)簽： prim adjg 算法 實(shí)驗(yàn)
上傳時(shí)間： 2016-10-07
上傳用戶：tonyshao
// -*- Mode: Verilog -*- // Filename : wb_master.v // Description : Wishbone Master Behavorial // Author : Winefred Washington // Created On : 2002 12 24 // Last Modified By: . // Last Modified On: . // Update Count : 0 // Status : Unknown, Use with caution! // Description Specification // General Description: 8, 16, 32-bit WISHBONE Master // Supported cycles: MASTER, READ/WRITE // MASTER, BLOCK READ/WRITE // MASTER, RMW // Data port, size: 8, 16, 32-bit // Data port, granularity 8-bit // Data port, Max. operand size 32-bit // Data transfer ordering: little endian // Data transfer sequencing: undefined
標(biāo)簽： Description Behavorial wb_master Filename
上傳時(shí)間： 2014-07-11
上傳用戶：zhanditian
The Inter IC bus or I2C bus is a simple bidirectional two wire bus designed primarily for general control and data transfer communication between ICs. Some of the features of the I2C bus are: • Two signal lines, a serial data line (SDA) and a serial clock line (SCL), and ground are required. A 12V supply line (500mA max.) for powering the peripherals often may be present. • Each device connected to the bus is software addressable by a unique address and simple master/ slave relationships exist at all times masters can operate as master-transmitters or as master-receivers. • The I2C bus is a true multi-master bus including collision detection and arbitration to prevent data corruption if two or more masters simultaneously initiate data transfer systems. • Serial, 8-bit oriented, bidirectional data transfers can be made at up to 100 KBit/s in the standard mode or up to 400 KBit/s in the fast mode.
標(biāo)簽： bus bidirectional primarily designed
上傳時(shí)間： 2013-12-11
上傳用戶：jeffery
采用Altera公司的FPGA芯片，在MAX+plus II軟件平臺(tái)上實(shí)現(xiàn)多路HDLC電路
上傳時(shí)間： 2016-11-13
上傳用戶：zhyiroy
設(shè)計(jì)一個(gè)能進(jìn)行時(shí)、分、秒計(jì)時(shí)的十二小時(shí)制或二十四小時(shí)制的數(shù)字鐘，并具有定時(shí)與鬧鐘功能，能在設(shè)定的時(shí)間發(fā)出鬧鈴音，能非常方便地對小時(shí)、分鐘和秒進(jìn)行手動(dòng)調(diào)節(jié)以校準(zhǔn)時(shí)間，每逢整點(diǎn)，產(chǎn)生報(bào)時(shí)音報(bào)時(shí)。 實(shí)驗(yàn)平臺(tái)： 1. 一臺(tái)PC機(jī)； 2. MAX+PLUSII10.1。 Verilog HDL語言實(shí)現(xiàn),還有完整的實(shí)驗(yàn)報(bào)告
標(biāo)簽： 分 計(jì)時(shí) 數(shù)字
上傳時(shí)間： 2013-12-09
上傳用戶：hphh
這是我用Delphi和Matlab寫的一個(gè)程序，可以生成立體圖像（3DS Max 腳本）、將平面圖像立體化、基本矩陣計(jì)算、極線校正。作者保留所有權(quán)利。請勿用于商業(yè)用途。歡迎大家對它進(jìn)行完善。
上傳時(shí)間： 2016-11-27
上傳用戶：dapangxie
function [U,center,result,w,obj_fcn]= fenlei(data) [data_n,in_n] = size(data) m= 2 ％ Exponent for U max_iter = 100 ％ Max. iteration min_impro =1e-5 ％ Min. improvement c=3 [center, U, obj_fcn] = fcm(data, c) for i=1:max_iter if F(U)>0.98 break else w_new=eye(in_n,in_n) center1=sum(center)/c a=center1(1)./center1 deta=center-center1(ones(c,1),:) w=sqrt(sum(deta.^2)).*a for j=1:in_n w_new(j,j)=w(j) end data1=data*w_new [center, U, obj_fcn] = fcm(data1, c) center=center./w(ones(c,1),:) obj_fcn=obj_fcn/sum(w.^2) end end display(i) result=zeros(1,data_n) U_=max(U) for i=1:data_n for j=1:c if U(j,i)==U_(i) result(i)=j continue end end end
標(biāo)簽： data function Exponent obj_fcn
上傳時(shí)間： 2013-12-18
上傳用戶：ynzfm
//奇異值分解法求廣義逆 //本函數(shù)返回值小于0表示在奇異值分解過程, //中迭代值超過了60次還未滿足精度要求. //返回值大于0表示正常返回。 //a-長度為m*n的數(shù)組，返回時(shí)其對角線依次給出奇異值，其余元素為0 //m-矩陣的行數(shù) //n-矩陣的列數(shù) //aa-長度為n*m的數(shù)組，返回式存放A的廣義逆 //eps-精度要求 //u-長度為m*m的數(shù)組，返回時(shí)存放奇異值分解的左奇異量U //v-長度為n*n的數(shù)組，返回時(shí)存放奇異值分解的左奇異量V //ka-整型變量，其值為max(n,m)+1 //調(diào)用函數(shù)：dluav()
上傳時(shí)間： 2016-12-15
上傳用戶：康郎
//使用gray code的解法 #include <iostream> #include <cmath> using namespace std #define ZERO 0 #define ONE 1 #define ODD 1 #define EVEN 0 #define RIGHT 1 #define LEFT 0 #define MAX 10
標(biāo)簽： include namespace iostream define
上傳時(shí)間： 2016-12-31
上傳用戶：luke5347
計(jì)算全息close all clc clear A=zeros(64) A(15:20,20:40)=1 A(15:50,20:25)=1 A(45:50,20:40)=1 A(30:34,20:35)=1 ％ ppp=exp(rand(64)*pi*2*i) A=A.*ppp ％ Author s email: zjliu2001@163.com figure imshow(abs(A),[]) Fa=fft2(fftshift(A)) Fs=fftshift(Fa) Am=abs(Fs) ％ amplitude Ph=angle(Fs) ％ phase s=11 ％ 這表示邊長嗎？ cgh=zeros(64*s) th=max(max(abs(Fs)))
標(biāo)簽： 20 close clear zeros
上傳時(shí)間： 2014-10-13
上傳用戶：wweqas
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