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• Phase-Locked Loop Circuit Design免費(fèi)下載

  資源簡(jiǎn)介：·Phase-Locked Loop Circuit Design

  標(biāo)簽： nbsp Phase-Locked Circuit Design

  上傳時(shí)間： 2013-04-24

  上傳用戶：lhc9102

• Digital Phase Locked Loop免費(fèi)下載

  資源簡(jiǎn)介：This work titled A Digital Phase Locked Loop based Signal and Symbol Recovery System for Wireless Channel is intended to serve as a document covering funda- mental concepts and application details related to the design of digital phase lock...

  標(biāo)簽： Digital Locked Phase Loop

  上傳時(shí)間： 2020-05-27

  上傳用戶：shancjb

• ％The phase locked loop(PLL),adjusts the phase of a local oscillator ％w.r.t the incoming modulated免費(fèi)下載

  資源簡(jiǎn)介：％The phase locked loop(PLL),adjusts the phase of a local oscillator ％w.r.t the incoming modulated signal.In this way,the phase of the ％incoming signal is locked and the signal is demodulated.This scheme ％is used in PM and FM as wel...

  標(biāo)簽： phase w.r.t oscillator modulated

  上傳時(shí)間： 2015-09-28

  上傳用戶：zhangzhenyu

• ADPLL of high level phase locked loop免費(fèi)下載

  資源簡(jiǎn)介：ADPLL of high level phase locked loop

  標(biāo)簽： locked ADPLL level phase

  上傳時(shí)間： 2016-12-04

  上傳用戶：wpwpwlxwlx

• This file is used to develop Phase locked loop.免費(fèi)下載

  資源簡(jiǎn)介：This file is used to develop Phase locked loop.

  標(biāo)簽： develop locked Phase This

  上傳時(shí)間： 2014-12-06

  上傳用戶：sk5201314

• CD4046 phase-locked loop induction heating power supply in the application of induction heating免費(fèi)下載

  資源簡(jiǎn)介：CD4046 phase-locked loop induction heating power supply in the application of induction heating

  標(biāo)簽： induction heating phase-locked application

  上傳時(shí)間： 2014-12-03

  上傳用戶：jkhjkh1982

• Very good code for Phase locked Loop in matlab免費(fèi)下載

  資源簡(jiǎn)介：Very good code for Phase locked Loop in matlab

  標(biāo)簽： locked matlab Phase Very

  上傳時(shí)間： 2014-01-16

  上傳用戶：zhuimenghuadie

• Phase Locked Loop Design Fundamentals免費(fèi)下載

  資源簡(jiǎn)介：描述 了PLL 的基礎(chǔ)知識(shí)哦，非常的 實(shí)用

  標(biāo)簽： Phase Locked Loop Design Fundamentals

  上傳時(shí)間： 2017-03-13

  上傳用戶：rfzhangyicheng

• Phase-Locked Loops for Wireless Communications (英).pdf免費(fèi)下載

  資源簡(jiǎn)介：資料->【E】光盤論文->【E5】英文書籍->Phase-Locked Loops for Wireless Communications (英).pdf

  標(biāo)簽： Communications Phase-Locked Wireless Loops

  上傳時(shí)間： 2013-07-27

  上傳用戶：大融融rr

• 寄存器和環(huán)路濾波器的設(shè)計(jì)免費(fèi)下載

  資源簡(jiǎn)介：The MAX2870 ultra-wideband phase-locked loop (PLL) and voltagecontrol oscillator (VCO) can operate in both integer-N and fractional-Nmodes, similar to the Analog Devices ADF4350 wideband synthesizer.This application note compares the MAX287...

  標(biāo)簽： 寄存器 環(huán)路濾波器

  上傳時(shí)間： 2014-12-23

  上傳用戶：變形金剛

• phase lock loop for coherent detection免費(fèi)下載

  資源簡(jiǎn)介：phase lock loop for coherent detection

  標(biāo)簽： detection coherent phase lock

  上傳時(shí)間： 2014-01-19

  上傳用戶：rocketrevenge

• initial working phase of the design of said editor, featuring multicasting, advanced linux keyboard免費(fèi)下載

  資源簡(jiǎn)介：initial working phase of the design of said editor, featuring multicasting, advanced linux keyboard handling, sub-hierarchical expansion, and multiple cursors (similar to the concept found in moonedit). The author respectfully requests y...

  標(biāo)簽： multicasting featuring advanced keyboard

  上傳時(shí)間： 2015-08-27

  上傳用戶：invtnewer

• A Stochastic Time-to-Digital Converter for Digital Phase-Locked Loops免費(fèi)下載

  資源簡(jiǎn)介：A Stochastic Time-to-Digital Converter for Digital Phase-Locked Loops

  標(biāo)簽： Time-to-Digital Phase-Locked Stochastic Converter

  上傳時(shí)間： 2014-01-16

  上傳用戶：ANRAN

• This document describes how to switch to and program the unisersal serial bus (USB) analog phase-lo免費(fèi)下載

  資源簡(jiǎn)介：This document describes how to switch to and program the unisersal serial bus (USB) analog phase-locked loop (APLL) on the C5506/C5507/C5509A devices. Example assembly programs for programming and switching to and from the APLL are also ...

  標(biāo)簽： describes unisersal document phase-lo

  上傳時(shí)間： 2014-01-13

  上傳用戶：hustfanenze

• another phase locked example for matlab免費(fèi)下載

  資源簡(jiǎn)介：another phase locked example for matlab

  標(biāo)簽： another example locked matlab

  上傳時(shí)間： 2017-09-15

  上傳用戶：franktu

• Phase-Locked+Loops+for+Wireless+Communications免費(fèi)下載

  資源簡(jiǎn)介：This book is intended for the graduate or advanced undergraduate engineer. The primary motivation for developing the text was to present a complete tutorial of phase-locked loops with a consistent notation. I believe this is critical for th...

  標(biāo)簽： Communications Phase-Locked Wireless Loops for

  上傳時(shí)間： 2020-05-31

  上傳用戶：shancjb

• MC145170在基本HF和VHF振蕩器中的應(yīng)用電路免費(fèi)下載

  資源簡(jiǎn)介：Phase–locked loop (PLL) frequency synthesizers are commonlyfound in communication gear today. Th

  標(biāo)簽： 145170 VHF MC 振蕩器

  上傳時(shí)間： 2013-04-24

  上傳用戶：yxgi5

• ISM射頻產(chǎn)品的晶體頻率計(jì)算免費(fèi)下載

  資源簡(jiǎn)介：Abstract: Many industrial/scientific/medical (ISM) band radio frequency (RF) products use crystal oscillators to generate areference for the phase-locked loop (PLL)-based local oscillator (LO). This tutorial provides a basic description of ...

  標(biāo)簽： ISM 射頻 晶體頻率 計(jì)算

  上傳時(shí)間： 2013-11-15

  上傳用戶：JasonC

• 開關(guān)穩(wěn)壓器的偏置低噪聲變?nèi)菝赓M(fèi)下載

  資源簡(jiǎn)介：? Telecommunication, satellite links and set-top boxes allrequire tuning a high frequency oscillator. The actualtuning element is a varactor diode, a 2-terminal device thatchanges capacitance as a function of reverse bias voltage.1 The o...

  標(biāo)簽： 開關(guān)穩(wěn)壓器 低噪聲 上傳時(shí)間： 2013-12-20

  上傳用戶：ABCDE

• PLL鎖相環(huán)免費(fèi)下載

  資源簡(jiǎn)介：PLL(Phase Locked Loop)： 為鎖相回路或鎖相環(huán)，用來(lái)統(tǒng)一整合時(shí)鐘信號(hào)，使高頻器件正常工作，如內(nèi)存的存取資料等。PLL用于振蕩器中的反饋技術(shù)。 許多電子設(shè)備要正常工作，通常需要外部的輸入信號(hào)與內(nèi)部的振蕩信號(hào)同步。一般的晶振由于工藝與成本原因，做不到...

  標(biāo)簽： PLL 鎖相環(huán)

  上傳時(shí)間： 2021-07-23

  上傳用戶：紫陽(yáng)帝尊

• ADC模數(shù)轉(zhuǎn)換器件Altium Designer AD原理圖庫(kù)元件庫(kù)免費(fèi)下載

  資源簡(jiǎn)介：ADC模數(shù)轉(zhuǎn)換器件Altium Designer AD原理圖庫(kù)元件庫(kù)SV text has been written to file : 4.4 - ADC模數(shù)轉(zhuǎn)換器件.csvLibrary Component Count : 29Name? ? ? ? ? ? ? ? Description------------------------------------------------------------------...

  標(biāo)簽： adc 模數(shù)轉(zhuǎn)換 altium designer

  上傳時(shí)間： 2022-03-13

  上傳用戶：

• 基于滑模觀測(cè)器與分?jǐn)?shù)階鎖相環(huán)的無(wú)傳感器PMSM矢量控制免費(fèi)下載

  資源簡(jiǎn)介：Abstract: A sliding mode observer and fractional-order phase-locked loop (FO-PLL) method is proposed for the sensorless speed control of a permanent magnet synchronous motor (PMSM).The saturation function is adopted in order to reduce the c...

  標(biāo)簽： 滑模觀測(cè)器 傳感器 pmsm 矢量控制

  上傳時(shí)間： 2022-06-18

  上傳用戶：

• 射頻鎖相環(huán)基礎(chǔ)理論免費(fèi)下載

  資源簡(jiǎn)介：一.基礎(chǔ)理論鎖相環(huán)路（Phase Locked Loop）是一個(gè)閉環(huán)的相位控制系統(tǒng)，它的輸出信號(hào)的相位能自動(dòng)跟蹤輸入信號(hào)相位。系統(tǒng)框圖如下：當(dāng)0，（1）與0：（1）相等時(shí)，兩矢量以相同的角速度旋轉(zhuǎn)，相對(duì)位置，即夾角維持不變，通常數(shù)值又較小，這就是環(huán)路的鎖定狀態(tài)。...

  標(biāo)簽： 射頻鎖相環(huán)

  上傳時(shí)間： 2022-06-21

  上傳用戶：

• 模擬cmos集成電路設(shè)計(jì)(design of analog免費(fèi)下載

  資源簡(jiǎn)介：模擬集成電路的設(shè)計(jì)與其說(shuō)是一門技術(shù)，還不如說(shuō)是一門藝術(shù)。它比數(shù)字集成電路設(shè)計(jì)需要更嚴(yán)格的分析和更豐富的直覺。嚴(yán)謹(jǐn)堅(jiān)實(shí)的理論無(wú)疑是嚴(yán)格分析能力的基石，而設(shè)計(jì)者的實(shí)踐經(jīng)驗(yàn)無(wú)疑是誕生豐富直覺的源泉。這也正足初學(xué)者對(duì)學(xué)習(xí)模擬集成電路設(shè)計(jì)感到困惑并難...

  標(biāo)簽： analog design cmos of

  上傳時(shí)間： 2014-12-23

  上傳用戶：杜瑩12345

• DDR SDRAM控制器的VHDL源代碼免費(fèi)下載

  資源簡(jiǎn)介：DDR SDRAM控制器的VHDL源代碼，含詳細(xì)設(shè)計(jì)文檔。 The DDR, DCM, and SelectI/O&#8482 features in the Virtex&#8482 -II architecture make it the perfect choice for implementing a controller of a Double Data Rate (DDR) SDRAM. The Digital Clock M...

  標(biāo)簽： SDRAM VHDL DDR 控制器

  上傳時(shí)間： 2014-11-01

  上傳用戶：l254587896

• The Hilbert Transform is an important component in communication systems, e.g. for single sideband m免費(fèi)下載

  資源簡(jiǎn)介：The Hilbert Transform is an important component in communication systems, e.g. for single sideband modulation/demodulation, amplitude and phase detection, etc. It can be formulated as filtering operation which makes it possible to approxima...

  標(biāo)簽： e.g. communication Transform important

  上傳時(shí)間： 2017-06-25

  上傳用戶：gxf2016

• XAPP854-數(shù)字鎖相環(huán)(DPLL)參考設(shè)計(jì)免費(fèi)下載

  資源簡(jiǎn)介：Many applications require a clock signal to be synchronous, phase-locked, or derived fromanother signal, such as a data signal or another clock. This type of clock circuit is important in

  標(biāo)簽： XAPP DPLL 854 數(shù)字鎖相環(huán)

  上傳時(shí)間： 2014-12-23

  上傳用戶：qq21508895

• LTC1062的低通濾波器應(yīng)用免費(fèi)下載

  資源簡(jiǎn)介：Highlights the LTC1062 as a lowpass filter in a phase lock loop. Describes how the loop's bandwidth can be increased and the VCO output jitter reduced when the LTC1062 is the loop filter. Compares it with a passive RC loop filter. Also disc...

  標(biāo)簽： 1062 LTC 低通濾波器

  上傳時(shí)間： 2013-10-24

  上傳用戶：chens000

• 游戲編程必看免費(fèi)下載

  資源簡(jiǎn)介：游戲編程必看，MIT出版社：Rules.of.Play.Game.Design.Fundamentals 游戲設(shè)計(jì)原則

  標(biāo)簽： 游戲編程

  上傳時(shí)間： 2015-11-25

  上傳用戶：hebmuljb

• The emphasis of this book is on real-time application of Synopsys tools, used to combat various pro免費(fèi)下載

  資源簡(jiǎn)介：The emphasis of this book is on real-time application of Synopsys tools, used to combat various problems seen at VDSM geometries. Readers will be exposed to an effective design methodology for handling complex, submicron ASIC designs. Si...

  標(biāo)簽： application real-time Synopsys emphasis

  上傳時(shí)間： 2017-07-05

  上傳用戶：waitingfy