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  • 2015_01_3GPP_unlicensed_Dino_Flore

    Licensed spectrum remains 3GPP operators’ top priority to deliver advanced services and user experience Opportunistic use of unlicensed spectrum is becoming an important complement for operators to meet the growing traffic demand Moving forward 3GPP operators will have two options to offload traffic to unlicensed spectrum: 1. Wi-Fi (via LTE/Wi-Fi interworking) 2. LTE over unlicensed It will then be up to each individual operator to choose which approach to use, which will depend on a number of factors

    標簽: 3GPP_unlicensed_Dino_Flore 2015 01

    上傳時間: 2020-05-26

    上傳用戶:shancjb

  • Coordinated+Multi-Point

    Mobile communication has gained significant importance in today’s society. As of 2010, the number of mobile phone subscribers has surpassed 5 billion [ABI10], and the global annual mobile revenue is soon expected to top $1 trillion [Inf10]. While these numbers appear promising for mobile operators at first sight, the major game-changer that has come up recently is the fact that the market is more and more driven by the demand for mobile data traffic [Cis10].

    標簽: Coordinated Multi-Point

    上傳時間: 2020-05-27

    上傳用戶:shancjb

  • IP Multimedia Subsystem(IMS) Handbook

    Fixed-mobile.convergence.and.voice-data.networks.have.merged.next-gen- eration,.value-added.applications.and.integrated.multimedia.services,.com- bining. Web. browsing,. instant. messaging,. presence,. voice. over. IP,. video. conferencing,. application. sharing,. telephony,. unified. messaging,. multi- media.content.delivery,.etc..on.top.of.different.network.technologies..The. convergence.of.the.communications.networks.is.motivated.by.the.need.to. support.many.forms.of.digital.traffic.as.well.as.to.amortize.implementation. and.operational.costs.of.the.underlying.networks..Historically,.the.approach. to. build. and. deploy. multimedia. services. has. focused. upon. single-point. solutions..

    標簽: Multimedia Subsystem Handbook IMS IP

    上傳時間: 2020-05-27

    上傳用戶:shancjb

  • RestoringConnections_IBM_CPL

    Commoditization is a serious threat to the telecommunications industry. Most CSPs offer similar services at rates designed to win what has become a price war. As a result, many face decreasing margins and difficulty sustaining differentiation based on prices or products alone. On top of commoditization, CSPs also face competition from OTT providers and an increasingly knowledgeable and demanding customer base. With access to growing amounts of data from an ever-increasing number of sources and devices, today’s empowered, savvy consumers know what they want and expect to get it.

    標簽: RestoringConnections_IBM_CPL

    上傳時間: 2020-06-01

    上傳用戶:shancjb

  • Visible Light Communication

    Visible light communications (VLC) is the name given to an optical wireless communication system that carries information by modulating light in the visible spectrum (400–700 nm) that is principally used for illumination [1–3]. The communications signal is encoded on top of the illumination light. Interest in VLC has grown rapidly with the growth of high power light emitting diodes (LEDs) in the visible spectrum. The motivation to use the illumination light for communication is to save energy by exploiting the illumination to carry information and, at the same time, to use technology that is “green” in comparison to radio frequency (RF) technology, while using the existing infrastructure of the lighting system. 

    標簽: Communication Visible Light

    上傳時間: 2020-06-01

    上傳用戶:shancjb

  • RFID_-_A_Guide_to_Radio_Frequency_IDentification

    Radio frequency identifi cation (RFID) technology is a wireless communication technology that enables users to uniquely identify tagged objects or people. RFID is rapidly becoming a cost-effective technology. This is in large part due to the efforts of Wal-Mart and the Department of Defense (DoD) to incorporate RFID technology into their supply chains. In 2003, with the aim of enabling pallet-level tracking of inventory, Wal-Mart issued an RFID mandate requiring its top suppliers to begin tagging pallets and cases, with Electronic Product Code (EPC) labels. The DoD quickly followed suit and issued the same mandate to its top 100 suppliers. This drive to incorporate RFID technology into their supply chains is motivated by the increased ship- ping, receiving and stocking effi ciency and the decreased costs of labor, storage, and product loss that pallet-level visibility of inventory can offer.

    標簽: A_Guide_to_Radio_Frequency_IDenti fication RFID

    上傳時間: 2020-06-08

    上傳用戶:shancjb

  • RFID+Essentials

    LIKE SO MANY OTHERS , THIS BOOK WAS WRITTEN BECAUSE WE COULDN ’ T FIND ONE LIKE IT . We needed something to hand to all of those people who have come to us asking for “a good book to read on RFID.” When we looked for candidates we found some great books, but most were aimed at electrical engineers or top-level managers, with very little for those of us who are in between. This book is for developers, system and software architects, and project managers, as well as students and professionals in all of the industries impacted by Radio Frequency Identification (RFID) who want to understand how this technology works. As the title suggests, this book is about RFID in general and not just the most recent developments; however, because so much is going on in the area of RFID for the supply chain and especially the Electronic Product Code (EPC), we have devoted consider- able space to these topics. Regardless of the type of RFID work you may be doing, we think you will find something useful here.

    標簽: Essentials RFID

    上傳時間: 2020-06-08

    上傳用戶:shancjb

  • Guide to Convolutional Neural Networks

    General paradigm in solving a computer vision problem is to represent a raw image using a more informative vector called feature vector and train a classifier on top of feature vectors collected from training set. From classification perspective, there are several off-the-shelf methods such as gradient boosting, random forest and support vector machines that are able to accurately model nonlinear decision boundaries. Hence, solving a computer vision problem mainly depends on the feature extraction algorithm

    標簽: Convolutional Networks Neural Guide to

    上傳時間: 2020-06-10

    上傳用戶:shancjb

  • FPGA采樣AD9238數據并通過VGA波形顯示例程 Verilog邏輯源碼Quartus工程文件+

    FPGA采樣AD9238數據并通過VGA波形顯示例程 Verilog邏輯源碼Quartus工程文件+文檔說明,FPGA型號Cyclone4E系列中的EP4CE6F17C8,Quartus版本17.1。ADC 模塊型號為 AN9238,最大采樣率 65Mhz,精度為12 位。實驗中把 AN9238 的 2 路輸入以波形方式在 HDMI 上顯示出來,我們可以用更加直觀的方式觀察波形,是一個數字示波器雛形。module top( input                       clk, input                       rst_n, output                      ad9238_clk_ch0, output                      ad9238_clk_ch1, input[11:0]                 ad9238_data_ch0, input[11:0]                 ad9238_data_ch1, //vga output output                      vga_out_hs, //vga horizontal synchronization output                      vga_out_vs, //vga vertical synchronization output[4:0]                 vga_out_r,  //vga red output[5:0]                 vga_out_g,  //vga green output[4:0]                 vga_out_b   //vga blue);wire                            video_clk;wire                            video_hs;wire                            video_vs;wire                            video_de;wire[7:0]                       video_r;wire[7:0]                       video_g;wire[7:0]                       video_b;wire                            grid_hs;wire                            grid_vs;wire                            grid_de;wire[7:0]                       grid_r;wire[7:0]                       grid_g;wire[7:0]                       grid_b;wire                            wave0_hs;wire                            wave0_vs;wire                            wave0_de;wire[7:0]                       wave0_r;wire[7:0]                       wave0_g;wire[7:0]                       wave0_b;wire                            wave1_hs;wire                            wave1_vs;wire                            wave1_de;wire[7:0]                       wave1_r;wire[7:0]                       wave1_g;wire[7:0]                       wave1_b;wire                            adc_clk;wire                            adc0_buf_wr;wire[10:0]                      adc0_buf_addr;wire[7:0]                       adc0_bu

    標簽: fpga ad9238

    上傳時間: 2021-10-27

    上傳用戶:qingfengchizhu

  • FPGA讀寫SD卡讀取BMP圖片通過LCD顯示例程實驗 Verilog邏輯源碼Quartus工程文件

    FPGA讀寫SD卡讀取BMP圖片通過LCD顯示例程實驗 Verilog邏輯源碼Quartus工程文件+文檔說明,FPGA型號Cyclone4E系列中的EP4CE6F17C8,Quartus版本17.1。1 實驗簡介在前面的實驗中我們練習了 SD 卡讀寫,VGA 視頻顯示等例程,本實驗將 SD 卡里的 BMP 圖片讀出,寫入到外部存儲器,再通過 VGA、LCD 等顯示。本實驗如果通過液晶屏顯示,需要有液晶屏模塊。2 實驗原理在前面的實驗中我們在 VGA、LCD 上顯示的是彩條,是 FPGA 內部產生的數據,本實驗將彩條替換為 SD 內的 BMP 圖片數據,但是 SD 卡讀取速度遠遠不能滿足顯示速度的要求,只能先寫入外部高速 RAM,再讀出后給視頻時序模塊顯示module top( input                       clk, input                       rst_n, input                       key1, output [5:0]                seg_sel, output [7:0]                seg_data, output                      vga_out_hs,        //vga horizontal synchronization output                      vga_out_vs,        //vga vertical synchronization output[4:0]                 vga_out_r,         //vga red output[5:0]                 vga_out_g,         //vga green output[4:0]                 vga_out_b,         //vga blue output                      sd_ncs,            //SD card chip select (SPI mode) output                      sd_dclk,           //SD card clock output                      sd_mosi,           //SD card controller data output input                       sd_miso,           //SD card controller data input output                      sdram_clk,         //sdram clock output                      sdram_cke,         //sdram clock enable output                      sdram_cs_n,        //sdram chip select output                      sdram_we_n,        //sdram write enable output                      sdram_cas_n,       //sdram column address strobe output                      sdram_ras_n,       //sdram row address strobe output[1:0]                 sdram_dqm,         //sdram data enable output[1:0]                 sdram_ba,          //sdram bank address output[12:0]                sdram_addr,        //sdram address inout[15:0]                 sdram_dq           //sdram data);parameter MEM_DATA_BITS         = 16  ;            //external memory user interface data widthparameter ADDR_BITS             = 24  

    標簽: fpga

    上傳時間: 2021-10-27

    上傳用戶:

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