Adaptive Filter. This script shows the BER performance of several types of equalizers in a static channel with a null in the passband. The script constructs and implements a linear equalizer object and a decision feedback equalizer (DFE) object. It also initializes and invokes a maximum likelihood sequence estimation (MLSE) equalizer. The MLSE equalizer is first invoked with perfect channel knowledge, then with a straightforward but imperfect channel estimation technique.
標(biāo)簽： performance equalizers Adaptive several
上傳時(shí)間： 2016-02-16
上傳用戶：yan2267246
DirectX not only provides fast access to the hardware and therefore incredibly speedy performance, but it also makes it much easier for hardware developers to produce new devices that work well in the Windows environment. The DirectX APIs take away the necessity of writing your own low-level, device-specific code to access hardware such as the display adapter and network card, making it much easier for you to write programs that take full advantage of the computer s multimedia capabilities.
標(biāo)簽： performance incredibly therefore hardware
上傳時(shí)間： 2016-02-16
上傳用戶：秦莞爾w
Intel® Integrated Performance Primitives for Intel® Architecture Intel 使用手冊(cè),包含(intel ipp)所有圖像處理相關(guān)的函數(shù)與說明,函數(shù)很全,你可以下載查看是不是包含你想用的函數(shù),(intel ipp)提供的庫基于Intel CPU,性能很高.
標(biāo)簽： Intel Architecture Performance Integrated
上傳時(shí)間： 2016-02-27
上傳用戶：dsgkjgkjg
optimizing VI Performance for professional applications.
標(biāo)簽： applications professional Performance optimizing
上傳時(shí)間： 2014-01-18
上傳用戶：sammi
SDRAM 參考設(shè)計(jì):主要包括The following figure shows a high-level block diagram for this reference design followed by a brief description of each sub-section. The design consists of: · PowerPC processor · PLB-OPB bridge · BlockRAM Memory Controller · SDRAM Controller · Two GPIO ports · A UART Port · External SDRAM
標(biāo)簽： high-level following reference diagram
上傳時(shí)間： 2013-12-15
上傳用戶：Miyuki
The market for miniature computer programming is exploding. C++ Footprint and Performance Optimization supplies programmers the knowledge they need to write code for the increasing number of hand-held devices, wearable computers, and intelligent appliances. This book gives readers valuable knowledge and programming techniques that are not currently part of traditional programming training. In the world of C++ programming, all other things being equal, programs that are smaller and faster are better. C++ Footprint and Performance Optimization contains case studies and sample code to give readers concrete examples and proven solutions to problems that don t have cut and paste solutions.
標(biāo)簽： Performance programming Optimizati Footprint
上傳時(shí)間： 2013-12-09
上傳用戶：wfl_yy
VHDL是Very High Speed Integrated Circuit Hardware Description Language的縮寫， 意思是超高速集成電路硬件描述語言。對(duì)于復(fù)雜的數(shù)字系統(tǒng)的設(shè)計(jì)，它有獨(dú)特的作用。它的硬件描述能力強(qiáng)，能輕易的描述出硬件的結(jié)構(gòu)和功能。這種語言的應(yīng)用至少意味著兩種重大的改變：電路的設(shè)計(jì)竟然可以通過文字描述的方式完成；電子電路可以當(dāng)作文件一樣來存儲(chǔ)。隨著現(xiàn)代技術(shù)的發(fā)展，這種語言的效益與作用日益明顯，每年均能夠以超過30％的速度快速成長(zhǎng)。 這次畢業(yè)設(shè)計(jì)的內(nèi)容是在簡(jiǎn)要介紹了VHDL語言的一些基本語法和概念后，進(jìn)一步應(yīng)用VHDL，在MAX+plusII 的環(huán)境下設(shè)計(jì)一個(gè)電子鐘，最后通過仿真出時(shí)序圖實(shí)現(xiàn)預(yù)定功能。電子鐘的時(shí)間顯示用到了七段數(shù)碼管(或稱七段顯示器)的電路設(shè)計(jì)，內(nèi)部的時(shí)間控制輸出則用到了各種設(shè)計(jì)，包括：加法計(jì)數(shù)器，掃描電路，控制秒、分、時(shí)的分頻電路，各種數(shù)制的轉(zhuǎn)換。
標(biāo)簽： Description Integrated Hardware Language
上傳時(shí)間： 2016-03-08
上傳用戶：hwl453472107
The high portable FAT filesystem library for embedded system.
標(biāo)簽： filesystem embedded portable library
上傳時(shí)間： 2016-03-08
上傳用戶：阿四AIR
This program simulates the bit-error-rate (BER) performance of OSTBC with L=4 antennas over the frequency flat Rayleigh block fading channel The code is developed for real orthogonal design, code rate 1/2 modulation- 16 QAM with gray coding resulting in 2 bits/sec/Hz.
標(biāo)簽： bit-error-rate performance simulates the
上傳時(shí)間： 2014-01-13
上傳用戶：whenfly
The PCI Local bus concept was developed to break the PC data I/O bottleneck and clearly opens the door to increasing system speed and expansion capabilities. The PCI Local bus moves high speed peripherals from the I/O bus and places them closer to the system’s processor bus, providing faster data transfers between the processor and peripherals. The PCI Local bus also addresses the industry’s need for a bus standard which is not directly dependent on the speed, size and type of system processor. It represents the first microprocessor independent bus offering performance more than adequate for the most demanding applications such as full-motion video.
標(biāo)簽： bottleneck developed the concept
上傳時(shí)間： 2014-12-03
上傳用戶：ikemada
蟲蟲下載站版權(quán)所有 京ICP備2021023401號(hào)-1
