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Device-to-Device

  • DSP/BIOS Driver Developer Kit 1.11 The DSP/BIOS Driver Developer Kit (DDK) provides a selection of

    DSP/BIOS Driver Developer Kit 1.11 The DSP/BIOS Driver Developer Kit (DDK) provides a selection of pre-tested DSP/BIOS device drivers, and documentation on how to write a driver to the DSP/BIOS driver model, known as IOM. The DDK includes C source code for all drivers. The DDK 1.11 has been validated with CCS 3.1 and DSP/BIOS 5.20.

    標簽: Developer Driver BIOS DSP

    上傳時間: 2014-11-23

    上傳用戶:maizezhen

  • Make and answer phone calls Detect tone and pulse digit from the phone line Capture Caller ID

    Make and answer phone calls Detect tone and pulse digit from the phone line Capture Caller ID Support blind transfer, single-step transfer/conference, consultation transfer/conference, hold, unhold. Control of the local phone handset, microphone and speaker of the modem Send and receive faxes Play and record on the phone line or sound card Play music in background mode Silence detection VU Meter Wave sound editor that allows your end-users to edit their own sound files. Voice recognition and voice synthesis. Full control over the serial port device ZModem file transfer utility File compression and encryption utility

    標簽: phone and Capture Detect

    上傳時間: 2013-11-30

    上傳用戶:水中浮云

  • This directory builds the Tape class driver for Microsoft® Windows® Server 2003. The class dri

    This directory builds the Tape class driver for Microsoft® Windows® Server 2003. The class driver implements device-independent support, and exports support routines for device-specific tape miniclass drivers. It handles device-independent tape requests and calls the tape minidriver routines to process device-specific functions. Class driver splits transfer requests, when necessary, to fit the maximum transfer size for the underlying host bus adapter. It also provides device-independent, tape-specific error handling, and calls the tape miniclass driver s device-specific error handling routines.

    標簽: class Microsoft directory reg

    上傳時間: 2013-12-09

    上傳用戶:huangld

  • Universal Serial Bus (USB) is a communications architecture that gives a personal computer (PC) th

    Universal Serial Bus (USB) is a communications architecture that gives a personal computer (PC) the ability to interconnect a variety of devices using a simple four- wire cable. The USB is actually a two-wire serial communication link that runs at either 1.5 or 12 megabits per second (mbs). USB protocols can configure devices at startup or when they are plugged in at run time. These devices are broken into various device classes. Each device class defines the common behavior and protocols for devices that serve similar functions. Some examples of USB device classes are shown in the following table

    標簽: communications architecture Universal computer

    上傳時間: 2015-12-08

    上傳用戶:stvnash

  • Application Note Abstract This Application Note introduces a complete and detailed PSoC® project

    Application Note Abstract This Application Note introduces a complete and detailed PSoC® project. Telephone Call Logger keeps the detailed record of approximately 945 phone calls (7-digit number is assumed to be one phone call) including date, start time and the duration of the phone call in the PSoC device. Users can get this detailed report into the PC environment by using free software, which is included in the project file. When records reach near full capacity of the Flash memory, an LED will turn on to show that it is necessary to backup the data. Software gets the data from PSoC, organizes it and prepares a printable version. Additionally, it sends the date and time information to the PSoC. The external parts in this project can be obtained easily in the market.

    標簽: Application Note introduces Abstract

    上傳時間: 2014-01-01

    上傳用戶:集美慧

  • This program accesses a SPI EEPROM using polled mode access. The F12x MCU is configured in 4-wire Si

    This program accesses a SPI EEPROM using polled mode access. The F12x MCU is configured in 4-wire Single Master Mode, and the EEPROM is the only slave device connected to the SPI bus. The read/write operations are tailored to access a Microchip 4 kB EEPROM

    標簽: configured accesses program EEPROM

    上傳時間: 2016-03-29

    上傳用戶:gut1234567

  • PCI設計指南The Xilinx LogiCORE PCI interface is a fully verified, pre-implemented PCI Bus interface. Th

    PCI設計指南The Xilinx LogiCORE PCI interface is a fully verified, pre-implemented PCI Bus interface. This interface is available in 32-bit and 64- bit versions, with support for multiple Xilinx FPGA device families. It is designed to support both Verilog-HDL and VHDL. The design examples in this book are provided in Verilog.

    標簽: interface PCI pre-implemented LogiCORE

    上傳時間: 2016-04-03

    上傳用戶:清風冷雨

  • As science advances, novel experiments are becoming more and more complex, requiring a zoo of contro

    As science advances, novel experiments are becoming more and more complex, requiring a zoo of control devices and electronics executing complicated sequences of steps. Device availability and monetary constrains usually lead to a highly heterogeneous setup with components from several different manufacturers using many different protocols and interfacing mechanisms. This often results in control software being puzzled together to use and provide a multitude of interfacing and control functionality, each using their own calling conventions, data structures, etc. To make matters worse, usually a group of relatively independent programmers is trying to write and maintain the code base. Often this causes extensive duplication of effort as program segments are hard to reuse, since unpredictable changes to the segments by the original authors might compromise other code using these segments.

    標簽: more experiments requiring advances

    上傳時間: 2013-12-24

    上傳用戶:qilin

  • // This program accesses a SPI EEPROM using polled mode access. The F06x MCU // is configured in 4-

    // This program accesses a SPI EEPROM using polled mode access. The F06x MCU // is configured in 4-wire Single Master Mode, and the EEPROM is the only // slave device connected to the SPI bus. The read/write operations are // tailored to access a Microchip 4 kB EEPROM 25LC320. The relevant hardware // connections of the F06x MCU are shown here:

    標簽: configured accesses program EEPROM

    上傳時間: 2014-01-18

    上傳用戶:liglechongchong

  • // This program accesses a SPI EEPROM using polled mode access. The F06x MCU // is configured in 4-

    // This program accesses a SPI EEPROM using polled mode access. The F06x MCU // is configured in 4-wire Single Master Mode, and the EEPROM is the only // slave device connected to the SPI bus. The read/write operations are // tailored to access a Microchip 4 kB EEPROM 25LC320. The relevant hardware // connections of the F06x MCU are shown here:

    標簽: configured accesses program EEPROM

    上傳時間: 2016-04-12

    上傳用戶:qb1993225

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