亚洲欧美第一页_禁久久精品乱码_粉嫩av一区二区三区免费野_久草精品视频

蟲蟲首頁| 資源下載| 資源專輯| 精品軟件
登錄| 注冊

Device-to-Device

  • XAPP390 - 利用CoolRunner-II CPLD設計數碼相機

      Digital cameras have become increasingly popular over the last few years. Digital imagingtechnology has grown to new markets including cellular phones and PDA devices. With thediverse marketplace, a variety of imaging technology must be available. Imaging technologyhas expanded to include both charge-coupled device (CCD) and CMOS image sensors.

    標簽: CoolRunner-II XAPP CPLD 390

    上傳時間: 2013-10-16

    上傳用戶:18710733152

  • 基于Xilinx FPGA的雙輸出DC/DC轉換器解決方案

      Xilinx FPGAs require at least two power supplies: VCCINTfor core circuitry and VCCO for I/O interface. For the latestXilinx FPGAs, including Virtex-II Pro, Virtex-II and Spartan-3, a third auxiliary supply, VCCAUX may be needed. Inmost cases, VCCAUX can share a power supply with VCCO.The core voltages, VCCINT, for most Xilinx FPGAs, rangefrom 1.2V to 2.5V. Some mature products have 3V, 3.3Vor 5V core voltages. Table 1 shows the core voltagerequirement for most of the FPGA device families. TypicalI/O voltages (VCCO) vary from 1.2V to 3.3V. The auxiliaryvoltage VCCAUX is 2.5V for Virtex-II Pro and Spartan-3, andis 3.3V for Virtex-II.

    標簽: Xilinx FPGA DC 輸出

    上傳時間: 2013-10-22

    上傳用戶:aeiouetla

  • xilinx Zynq-7000 EPP產品簡介

    The Xilinx Zynq-7000 Extensible Processing Platform (EPP) redefines the possibilities for embedded systems, giving system and software architects and developers a flexible platform to launch their new solutions and traditional ASIC and ASSP users an alternative that aligns with today’s programmable imperative. The new class of product elegantly combines an industrystandard ARMprocessor-based system with Xilinx 28nm programmable logic—in a single device. The processor boots first, prior to configuration of the programmable logic. This, along with a streamlined workflow, saves time and effort and lets software developers and hardware designers start development simultaneously. 

    標簽: xilinx Zynq 7000 EPP

    上傳時間: 2013-10-09

    上傳用戶:evil

  • PLD對FPGA數據加密

    SRAM-based FPGAs are non-volatile devices. Upon powerup, They are required to be programmed from an external source. This procedure allows anyone to easily monitor the bit-stream, and clone the device. The problem then becomes how can you effectively protect your intellectual property from others in an architecture where the part is externally programmed?

    標簽: FPGA PLD 數據加密

    上傳時間: 2013-10-20

    上傳用戶:磊子226

  • pci e PCB設計規范

    This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.  

    標簽: pci PCB 設計規范

    上傳時間: 2014-01-24

    上傳用戶:s363994250

  • 8259 VHDL代碼

    a8259 可編程中斷控制 altera提供 The a8259 is designed to simplify the implementation of the interrupt interface  in 8088 and 8086  based microcomputer systems. The device is known as a programmable interrupt controller.  The a8259 receives and prioritizes up to 8 interrupts,  and in the cascade mode, this can be expanded up to  64 interrupts. An asynchronous reset and a clock input have been added to improve operation and reliability.

    標簽: 8259 VHDL 代碼

    上傳時間: 2015-01-02

    上傳用戶:panpanpan

  • 能量收集系統的設計挑戰

    Modern electronic systems solve so many difficult problems that they often seem like magic. Nonetheless, these systems all have thesame basic limitation: they need a source of electrical power! Most of the time this is a straightforward challenge for the electronicdesigner, because there are many power-delivery solutions. Yet sometimes a device has no direct power source, and running wiresor replacing batteries is impractical. Even when long-life batteries are usable, they eventually need to be replaced, which requires aservice call.

    標簽: 能量收集

    上傳時間: 2015-01-03

    上傳用戶:zukfu

  • HDMI一致性測試

      The high defi nition multimedia interface (HDMI) is fastbecoming the de facto standard for passing digitalaudio and video data in home entertainment systems.This standard includes an I2C type bus called a displaydata channel (DDC) that is used to pass extended digitalinterface data (EDID) from the sinkdevice (such as adigital TV) to the source device (such as a digital A/Vreceiver). EDID includes vital information on the digitaldata formats that the sink device can accept. The HDMIspecifi cation requires that devices have less than 50pFof input capacitance on their DDC bus lines, which canbe very diffi cult to meet. The LTC®4300A’s capacitancebuffering feature allows devices to pass the HDMI DDCinput capacitance compliance test with ease.

    標簽: HDMI 測試

    上傳時間: 2013-11-21

    上傳用戶:tian126vip

  • 基于EZ-USB的數據傳輸接口設計

    利用EZ-USB接口芯片AN2131Q實現了基于TMS320C5409的水聲信號采集及混沌特性研究系統中的高速數據通信,提出了一種采用FIFO緩存芯片實現AN2131Q與TMS320C5409的連接方法,深入研究了EZ-USB序列接口芯片的固件、設備驅動和用戶程序開發過程。關鍵詞:AN2131Q; TMS320C5409; IDT72V02;數據通信ABSTRACT: Using AN2131Q as the control chip, the communication between DSP and PC in the underwater acoustic signal acquisition and chaotic characteristics study system is realized. The method is proposed that using FIFO to realize the connectivity between AN2131Q and TMS320C5409. The development of programming Firmware、device driver and user application are thoroughly researched.Key words: AN2131Q; TMS320C5409; IDT72V02; data communication

    標簽: EZ-USB 數據傳輸 接口設計

    上傳時間: 2014-04-03

    上傳用戶:hahayou

  • Addfilter is a command-line application which adds and removes filter drivers for a given drive or v

    Addfilter is a command-line application which adds and removes filter drivers for a given drive or volume. It is intended to demonstrate how to insert a filter driver into the driver stack of a device. The sample illustrates how to do this by using the SetupDi APIs. The sample works on both x86 and Alpha platforms. It has only been tested in a 32-bit environment. Since Addfilter is not a driver, it does not deal with Plug and Play or Power Management.

    標簽: command-line application Addfilter drivers

    上傳時間: 2013-12-30

    上傳用戶:天誠24

主站蜘蛛池模板: 金乡县| 兴国县| 石城县| 灵武市| 玉山县| 普宁市| 山西省| 乐都县| 闽侯县| 基隆市| 米易县| 崇左市| 门头沟区| 嘉峪关市| 柞水县| 蒙阴县| 乾安县| 天祝| 克拉玛依市| 洛宁县| 奉新县| 华亭县| 英山县| 平顺县| 呈贡县| 凤凰县| 洛扎县| 阿尔山市| 元朗区| 伊宁市| 满城县| 法库县| 广平县| 将乐县| 库车县| 湘阴县| 章丘市| 韶关市| 嵊泗县| 岑溪市| 荣成市|