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Auto-Machine-Learning-Methods-Sys

  • 采用TüV認證的FPGA開發功能安全系統

    This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 圖Figure 1. Local Safety System

    標簽: FPGA 安全系統

    上傳時間: 2013-11-14

    上傳用戶:zoudejile

  • WP369可擴展式處理平臺-各種嵌入式系統的理想解決方案

    WP369可擴展式處理平臺-各種嵌入式系統的理想解決方案 :Delivering unrivaled levels of system performance,flexibility, scalability, and integration to developers,Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's dual-core Cortex™-A9 MPCore processors and Xilinx’s 28 nm programmable logic,the Extensible Processing Platform takes a processor-centric approach by defining a comprehensive processor system implemented with standard design methods. This approach provides Software Developers a familiar programming environment within an optimized, full featured,powerful, yet low-cost, low-power processing platform.

    標簽: 369 WP 擴展式 處理平臺

    上傳時間: 2013-10-18

    上傳用戶:cursor

  • Creating Safe State Machines(Mentor)

      Finite state machines are widely used in digital circuit designs. Generally, when designing a state machine using an HDL, the synthesis tools will optimize away all states that cannot be reached and generate a highly optimized circuit. Sometimes, however, the optimization is not acceptable. For example, if the circuit powers up in an invalid state, or the circuit is in an extreme working environment and a glitch sends it into an undesired state, the circuit may never get back to its normal operating condition.

    標簽: Creating Machines Mentor State

    上傳時間: 2013-11-02

    上傳用戶:xauthu

  • 基于FPGA+DSP模式的智能相機設計

    針對嵌入式機器視覺系統向獨立化、智能化發展的要求,介紹了一種嵌入式視覺系統--智能相機。基于對智能相機體系結構、組成模塊和圖像采集、傳輸和處理技術的分析,對國內外的幾款智能相機進行比較。綜合技術發展現狀,提出基于FPGA+DSP模式的硬件平臺,并提出智能相機的發展方向。分析結果表明,該系統設計可以實現脫離PC運行,完成圖像獲取與分析,并作出相應輸出。 Abstract:  This paper introduced an embedded vision system-intelligent camera ,which was for embedded machine vision systems to an independent and intelligent development requirements. Intelligent camera architecture, component modules and image acquisition, transmission and processing technology were analyzed. After comparing integrated technology development of several intelligent cameras at home and abroad, the paper proposed the hardware platform based on FPGA+DSP models and made clear direction of development of intelligent cameras. On the analysis of the design, the results indicate that the system can run from the PC independently to complete the image acquisition and analysis and give a corresponding output.

    標簽: FPGA DSP 模式 智能相機

    上傳時間: 2013-11-14

    上傳用戶:無聊來刷下

  • 基于FPGA的光纖光柵解調系統的研究

     波長信號的解調是實現光纖光柵傳感網絡的關鍵,基于現有的光纖光柵傳感器解調方法,提出一種基于FPGA的雙匹配光纖光柵解調方法,此系統是一種高速率、高精度、低成本的解調系統,并且通過引入雙匹配光柵有效地克服了雙值問題同時擴大了檢測范圍。分析了光纖光柵的測溫原理并給出了該方案軟硬件設計,綜合考慮系統的解調精度和FPGA的處理速度給出了基于拉格朗日的曲線擬合算法。 Abstract:  Sensor is one of the most important application of the fiber grating. Wavelength signal demodulating is the key techniques to carry out fiber grating sensing network, based on several existing methods of fiber grating sensor demodulation inadequate, a two-match fiber grating demodulation method was presented. This system is a high-speed, high precision, low-cost demodulation system. And by introducing a two-match grating effectively overcomes the problem of double value while expands the scope of testing. This paper analyzes the principle of fiber Bragg grating temperature and gives the software and hardware design of the program. Considering the system of demodulation accuracy and processing speed of FPGA,this paper gives the curve fitting algorithm based on Lagrange.

    標簽: FPGA 光纖光柵 解調系統

    上傳時間: 2013-10-10

    上傳用戶:zxc23456789

  • 計算FR4上的差分阻抗(PDF)

    Calculation of the Differential Impedance of Tracks on FR4 substrates There is a discrepancy between calculated and measured values of impedance for differential transmission lineson FR4. This is especially noticeable in the case of surface microstrip configurations. The anomaly is shown tobe due to the nature of the substrate material. This needs to be considered as a layered structure of epoxy resinand glass fibre. Calculations, using Boundary Element field methods, show that the distribution of the electricfield within this layered structure determines the apparent dielectric constant and therefore affects theimpedance. Thus FR4 cannot be considered to be uniform dielectric when calculating differential impedance.

    標簽: FR4 計算 差分阻抗

    上傳時間: 2013-10-18

    上傳用戶:masochism

  • 集合式直流電能表(小功率的)

    集合式直流電能表(小功率的) 特點: 精確度0.05%滿刻度±1位數 可同時量測與顯示/直流電壓/電流/瓦特(千瓦)/瓦特小時(千瓦小時) 電壓輸入(DC0-99.99V/0-600.0V)自動變檔功能 顯示范圍0-9999(電流/瓦特/千瓦),0至99999999(八位數瓦特小時)可任意規劃 數位RS-485 界面 (Optional) 主要規格: 輔助電源消耗功率:<0.35VA(DC12V/DC24V) <0.5VA(DC48V) <1.5VA(AC90-240V(50/60Hz)) 精確度: 0.05% F.S. ±1 digit (23 ±5℃) 輸入范圍:Auto range(DC0-99.99V/0-600.0V(DC voltage)) 輸入抗阻:>5MΩ(DC voltage) 取樣時間:10 cycles/second(total) 過載顯示: " doFL " 顯示值范圍: 0-9999 digit(DCA/W(KW)) 0-9999999.999 digit(WH/(KWH)) RS-485傳輸速度: 19200/9600/4800/2400 selective RS-485通訊位址: "01"-"FF"(0-255) RS-485通信協議: Modbus RTU mode 溫度系數: 50ppm/℃ (0-50℃) 顯示幕:Bight Red LEDs high 10.16 mm(0.4") 參數設定方式: Touch switches 記憶方式: Non-volatile E²PROM memory 絕緣耐壓能力:2KVac/1min.(input/output)(RS-485(Isolating)) 1600 Vdc (input/output) (RS-485(Isolating)) 使用環境條件: 0-50℃(20 to 90% RH non-condensed) 存放環境條件: 0-70℃(20 to 90% RH non-condensed) CE認證: EN 55022:1998/A1:2000 Class A EN 61000-3-2:2000 EN 61000-3-3:1995/A1:2001 EN 55024:1998/A1:2001

    標簽: 直流 電能表 小功率

    上傳時間: 2013-11-20

    上傳用戶:s363994250

  • 運算放大器穩定時間的測量

    The AN10 begins with a survey of methods for measuring op amp settling time. This commentary develops into circuits for measuring settling time to 0.0005%. Construction details and results are presented. Appended sections cover oscilloscope overload limitations and amplifier frequency compensation.

    標簽: 運算放大器 穩定時間 測量

    上傳時間: 2013-11-14

    上傳用戶:JIMMYCB001

  • superpro 280驅動及編程器軟件

    已通過CE認證。(為什么要選擇經過CE認證的編程器?) 程速度無與倫比,逼近芯片理論極限。 基本配置48腳流行驅動電路。所選購的適配器都是通用的(插在DIP48鎖緊座上),即支持同封裝所有類型器件,48腳及以下DIP器件無需適配器直接支持。通用適配器保證快速新器件支持。I/O電平由DAC控制,直接支持低達1.5V的低壓器件。 更先進的波形驅動電路極大抑制工作噪聲,配合IC廠家認證的算法,無論是低電壓器件、二手器件還是低品質器件均能保證極高的編程良品率。編程結果可選擇高低雙電壓校驗,保證結果持久穩固。 支持FLASH、EPROM、EEPROM、MCU、PLD等器件。支持新器件僅需升級軟件(免費)??蓽y試SRAM、標準TTL/COMS電路,并能自動判斷型號。 自動檢測芯片錯插和管腳接觸不良,避免損壞器件。 完善的過流保護功能,避免損壞編程器。 邏輯測試功能??蓽y試和自動識別標準TTL/CMOS邏輯電路和用戶自定義測試向量的非標準邏輯電路。 豐富的軟件功能簡化操作,提高效率,避免出錯,對用戶關懷備至。工程(Project)將用戶關于對象器件的各種操作、設置,包括器件型號設定、燒寫文件的調入、配置位的設定、批處理命令等保存在工程文件中,每次運行時一步進入寫片操作。器件型號選擇和文件載入均有歷史(History)記錄,方便再次選擇。批處理(Auto)命令允許用戶將擦除、查空、編程、校驗、加密等常用命令序列隨心所欲地組織成一步完成的單一命令。量產模式下一旦芯片正確插入CPU即自動啟動批處理命令,無須人工按鍵。自動序列號功能按用戶要求自動生成并寫入序列號。借助于開放的API用戶可以在線動態修改數據BUFFER,使每片芯片內容均不同。器件型號選錯,軟件按照實際讀出的ID提示相近的候選型號。自動識別文件格式, 自動提示文件地址溢出。 軟件支持WINDOWS98/ME/NT/2000/XP操作系統(中英文)。  器件型號  編程(秒)  校驗(秒)  P+V (s)  Type  28F320W18  9  4.5  13.5  32Mb FLASH  28F640W30  18  9  27  64Mb FLASH  AM29DL640E  38.3  10.6  48.9  64Mb FLASH  MB84VD21182DA  9.6  2.9  12.5  16Mb FLASH  MB84VD23280FA  38.3  10.6  48.9  64Mb FLASH  LRS1381  13.3  4.6  19.9  32Mb FLASH  M36W432TG  11.8  4.6  16.4  32Mb FLASH  MBM29DL323TE  17.5  5.5  23.3  32Mb FLASH  AT89C55WD  2.1  1  3.1  20KB MCU  P89C51RD2B  4.6  0.9  5.5  64KB MCU  

    標簽: superpro 280 驅動 編程器軟件

    上傳時間: 2013-11-21

    上傳用戶:xiaoyuer

  • CGAL is a collaborative effort of several sites in Europe and Israel. The goal is to make the most i

    CGAL is a collaborative effort of several sites in Europe and Israel. The goal is to make the most important of the solutions and methods developed in computational geometry available to users in industry and academia in a C++ library. The goal is to provide easy access to useful, reliable geometric algorithms

    標簽: collaborative several Europe Israel

    上傳時間: 2015-01-09

    上傳用戶:refent

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