for 51 for arm
上傳時(shí)間： 2013-10-10
上傳用戶：xiaoyuer
for 51 for arm
上傳時(shí)間： 2013-11-14
上傳用戶：huql11633
Abstract: Using a wafer-level package (WLP) can reduce the overall size and cost of your solution.However when using a WLP IC, the printed circuit board (PCB) layout can become more complex and, ifnot carefully planned, result in an unreliable design. This article presents some PCB designconsiderations and general recommendations for choosing a 0.4mm- or 0.5mm-pitch WLP for yourapplication.
標(biāo)簽： Considerations Guidelines and Design
上傳時(shí)間： 2013-11-09
上傳用戶：ls530720646
In this paper, we discuss efficient coding and design styles using verilog. This can beimmensely helpful for any digital designer initiating designs. Here, we address different problems rangingfrom RTL-Gate Level simulation mismatch to race conditions in writing behavioral models. All theseproblems are accompanied by an example to have a better idea, and these can be taken care off if thesecoding guidelines are followed. Discussion of all the techniques is beyond the scope of this paper, however,here we try to cover a few of them.
標(biāo)簽： Efficient Verilog Digital Coding
上傳時(shí)間： 2013-11-23
上傳用戶：我干你啊
本文論述了狀態(tài)機(jī)的verilog編碼風(fēng)格,以及不同編碼風(fēng)格的優(yōu)缺點(diǎn)，Steve Golson's 1994 paper, "State Machine Design Techniques for Verilog and VHDL" [1], is agreat paper on state machine design using Verilog, VHDL and Synopsys tools. Steve's paper alsooffers in-depth background concerning the origin of specific state machine types.This paper, "State Machine Coding Styles for Synthesis," details additional insights into statemachine design including coding style approaches and a few additional tricks.
標(biāo)簽： Synthesis Machine Coding Styles
上傳時(shí)間： 2013-10-12
上傳用戶：sardinescn
Finite state machines are widely used in digital circuit designs. Generally, when designing a state machine using an HDL, the synthesis tools will optimize away all states that cannot be reached and generate a highly optimized circuit. Sometimes, however, the optimization is not acceptable. For example, if the circuit powers up in an invalid state, or the circuit is in an extreme working environment and a glitch sends it into an undesired state, the circuit may never get back to its normal operating condition.
標(biāo)簽： Creating Machines Mentor State
上傳時(shí)間： 2013-11-02
上傳用戶：xauthu
LabVIEW+For+ARM+Lee
上傳時(shí)間： 2013-10-26
上傳用戶：franktu
NTFS(NT文件系統(tǒng)) for Linux的一個(gè)實(shí)現(xiàn)源碼
標(biāo)簽： Linux NTFS for 文件系統(tǒng)
上傳時(shí)間： 2015-01-04
上傳用戶：Divine
站長(zhǎng)寫(xiě)的使用OCI開(kāi)發(fā)Oracle程序的通用函數(shù)庫(kù)for unix
上傳時(shí)間： 2015-01-04
上傳用戶：363186
KeyPro加密狗模擬器 v4.20 for DOS
上傳時(shí)間： 2013-12-12
上傳用戶：lacsx
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