相 關(guān) 資 源

• State Machine Coding Styles for Synthesis免費(fèi)下載

  資源簡(jiǎn)介：? 本文論述了狀態(tài)機(jī)的verilog編碼風(fēng)格,以及不同編碼風(fēng)格的優(yōu)缺點(diǎn)，Steve Golson's 1994 paper, "State Machine Design Techniques for Verilog and VHDL" [1], is agreat paper on state Machine design using Verilog, VHDL and Synopsys tools. Steve's ...

  標(biāo)簽： Synthesis Machine Coding Styles

  上傳時(shí)間： 2013-10-15

  上傳用戶：dancnc

• State Machine Coding Styles for Synthesis免費(fèi)下載

  資源簡(jiǎn)介：? 本文論述了狀態(tài)機(jī)的verilog編碼風(fēng)格,以及不同編碼風(fēng)格的優(yōu)缺點(diǎn)，Steve Golson's 1994 paper, "State Machine Design Techniques for Verilog and VHDL" [1], is agreat paper on state Machine design using Verilog, VHDL and Synopsys tools. Steve's ...

  標(biāo)簽： Synthesis Machine Coding Styles

  上傳時(shí)間： 2013-10-12

  上傳用戶：sardinescn

• State.Machine.Coding.Styles.for.Synthesis（狀態(tài)機(jī)免費(fèi)下載

  資源簡(jiǎn)介：State.Machine.Coding.Styles.for.Synthesis（狀態(tài)機(jī)，英文,VHDL）

  標(biāo)簽： Synthesis Machine Coding Styles

  上傳時(shí)間： 2013-12-22

  上傳用戶：vodssv

• Coding Styles for if Statements and case Statements免費(fèi)下載

  資源簡(jiǎn)介：Coding Styles for if Statements and case Statements

  標(biāo)簽： Statements Coding Styles case

  上傳時(shí)間： 2014-01-23

  上傳用戶：waizhang

• Quantum Platform(QP) is a family of very lightweight, state Machine-based frameworks for embedded sy免費(fèi)下載

  資源簡(jiǎn)介：Quantum Platform(QP) is a family of very lightweight, state Machine-based frameworks for embedded systems. QP enables developing well-structured embedded applications as a set of concurrently executing hierarchical state Machines (UML state...

  標(biāo)簽： Machine-based lightweight frameworks Platform

  上傳時(shí)間： 2015-12-22

  上傳用戶：jichenxi0730

• Guide to HDL Coding Styles for Synthesis免費(fèi)下載

  資源簡(jiǎn)介：這篇文章討論了不同HDL代碼的編寫(xiě)方式，對(duì)綜合結(jié)果的影響。閱讀本文對(duì)深入了解綜合工具和提高HDL的編寫(xiě)水平有不少幫助，原文時(shí)針對(duì)Synopsys的綜合軟件論述的，但對(duì)所有綜合軟件，都有普遍的借鑒意義 ?

  標(biāo)簽： Synthesis Coding Styles Guide

  上傳時(shí)間： 2014-12-23

  上傳用戶：huql11633

• Guide to HDL Coding Styles for Synthesis免費(fèi)下載

  資源簡(jiǎn)介：這篇文章討論了不同HDL代碼的編寫(xiě)方式，對(duì)綜合結(jié)果的影響。閱讀本文對(duì)深入了解綜合工具和提高HDL的編寫(xiě)水平有不少幫助，原文時(shí)針對(duì)Synopsys的綜合軟件論述的，但對(duì)所有綜合軟件，都有普遍的借鑒意義 ?

  標(biāo)簽： Synthesis Coding Styles Guide

  上傳時(shí)間： 2014-01-11

  上傳用戶：亞亞娟娟123

• Designing a synchronous finite state Machine (FSM) is a common task for a digital logic engineer. T免費(fèi)下載

  資源簡(jiǎn)介：Designing a synchronous finite state Machine (FSM) is a common task for a digital logic engineer. This paper discusses a variety of issues regarding FSM design using Synopsys Design Compiler. Verilog and VHDL Coding Styles are presented...

  標(biāo)簽： synchronous Designing engineer digital

  上傳時(shí)間： 2014-01-17

  上傳用戶：dreamboy36

• -- State Machine for reading data from Dallas 1621 -- -- Testsystem for i2c controller免費(fèi)下載

  資源簡(jiǎn)介：-- State Machine for reading data from Dallas 1621 -- -- Testsystem for i2c controller

  標(biāo)簽： Testsystem controller for Machine

  上傳時(shí)間： 2015-07-01

  上傳用戶：txfyddz

• a super good method for designing finite state Machine免費(fèi)下載

  資源簡(jiǎn)介：a super good method for designing finite state Machine

  標(biāo)簽： designing Machine finite method

  上傳時(shí)間： 2015-07-25

  上傳用戶：大三三

• user mannual for state Machine免費(fèi)下載

  資源簡(jiǎn)介：user mannual for state Machine

  標(biāo)簽： mannual Machine state user

  上傳時(shí)間： 2014-01-18

  上傳用戶：zhanditian

• it is a verilog code written for MELAY state Machine based UART and it wll synthesize in xinlix免費(fèi)下載

  資源簡(jiǎn)介：it is a verilog code written for MELAY state Machine based UART and it wll synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device]

  標(biāo)簽： synthesize verilog Machine written

  上傳時(shí)間： 2013-12-11

  上傳用戶：yepeng139

• How to infer a finite state Machine for fpga altera xilinx免費(fèi)下載

  資源簡(jiǎn)介：How to infer a finite state Machine for fpga altera xilinx

  標(biāo)簽： Machine finite altera xilinx

  上傳時(shí)間： 2014-01-10

  上傳用戶：鳳臨西北

• very useful for the whom uses finite state Machine and it is used for speech免費(fèi)下載

  資源簡(jiǎn)介：very useful for the whom uses finite state Machine and it is used for speech

  標(biāo)簽： for Machine useful finite

  上傳時(shí)間： 2017-04-18

  上傳用戶：xieguodong1234

• rc5 key expansion algorithm implementation in vhdl, using state Machine too. use ieee papers for mor免費(fèi)下載

  資源簡(jiǎn)介：rc5 key expansion algorithm implementation in vhdl, using state Machine too. use ieee papers for more detailed description

  標(biāo)簽： implementation expansion algorithm Machine

  上傳時(shí)間： 2017-07-14

  上傳用戶：lyy1234

• VHDL for Synthesis for vhdl Coding ....免費(fèi)下載

  資源簡(jiǎn)介：VHDL for Synthesis for vhdl Coding ....

  標(biāo)簽： for Synthesis Coding VHDL

  上傳時(shí)間： 2017-08-06

  上傳用戶：qoovoop

• Verilog and VHDL狀態(tài)機(jī)設(shè)計(jì)免費(fèi)下載

  資源簡(jiǎn)介：Verilog and VHDL狀態(tài)機(jī)設(shè)計(jì)，英文pdf格式 State Machine design techniques for Verilog and VHDL Abstract : Designing a synchronous finite state Another way of organizing a state Machine (FSM) is a common task for a digital logic only one l...

  標(biāo)簽： Verilog VHDL and 狀態(tài)

  上傳時(shí)間： 2013-12-19

  上傳用戶：change0329

• GNU ccScript is a C++ class framework for creating a virtual Machine execution system for use with a免費(fèi)下載

  資源簡(jiǎn)介：GNU ccScript is a C++ class framework for creating a virtual Machine execution system for use with and as a scripting/assembler language for state-transition driven realtime systems. The most common example of this is as the core of the scr...

  標(biāo)簽： framework for execution ccScript

  上傳時(shí)間： 2013-12-18

  上傳用戶：sssl

• SMC takes a state Machine stored in a .sm file and generates a State pattern in twelve programming l免費(fèi)下載

  資源簡(jiǎn)介：SMC takes a state Machine stored in a .sm file and generates a State pattern in twelve programming languages. Includes: default transitions, transition args, transition guards, push/pop transitions and Entry/Exit actions. See User Manual fo...

  標(biāo)簽： programming generates Machine pattern

  上傳時(shí)間： 2013-12-25

  上傳用戶：gaome

• RC5 decryption algorithm implementation, using vhdl, with state Machine implementation, use ieee pap免費(fèi)下載

  資源簡(jiǎn)介：RC5 decryption algorithm implementation, using vhdl, with state Machine implementation, use ieee papers for more detailed description.

  標(biāo)簽： implementation decryption algorithm Machine

  上傳時(shí)間： 2014-01-06

  上傳用戶：bruce5996

• Design Safe Verilog State Machine（Synplicity）免費(fèi)下載

  資源簡(jiǎn)介：? One of the strengths of Synplify is the Finite State Machine compiler. This is a powerfulfeature that not only has the ability to automatically detect state Machines in the sourcecode, and implement them with either sequential, gray, o...

  標(biāo)簽： Synplicity Machine Verilog Design

  上傳時(shí)間： 2013-10-23

  上傳用戶：司令部正軍級(jí)

• Design Safe Verilog State Machine（Synplicity）免費(fèi)下載

  資源簡(jiǎn)介：? One of the strengths of Synplify is the Finite State Machine compiler. This is a powerfulfeature that not only has the ability to automatically detect state Machines in the sourcecode, and implement them with either sequential, gray, o...

  標(biāo)簽： Synplicity Machine Verilog Design

  上傳時(shí)間： 2013-10-20

  上傳用戶：蒼山觀海

• Verilog Coding Style for Efficient Digital Design免費(fèi)下載

  資源簡(jiǎn)介：Verilog Coding Style for Efficient Digital Design

  標(biāo)簽： Efficient Verilog Digital Coding

  上傳時(shí)間： 2015-01-21

  上傳用戶：PresidentHuang

• -- Moore State Machine with explicit state enCoding -- dowload from: www.fpga.com.cn & www.pld.com.免費(fèi)下載

  資源簡(jiǎn)介：-- Moore State Machine with explicit state enCoding -- dowload from: www.fpga.com.cn & www.pld.com.cn

  標(biāo)簽： com www explicit enCoding

  上傳時(shí)間： 2015-07-02

  上傳用戶：chenbhdt

• 異步復(fù)位狀態(tài)機(jī) -- State Machine with Asynchronous Reset -- dowload from: www.fpga.com.cn & www.pld.com.cn免費(fèi)下載

  資源簡(jiǎn)介：異步復(fù)位狀態(tài)機(jī) -- State Machine with Asynchronous Reset -- dowload from: www.fpga.com.cn & www.pld.com.cn

  標(biāo)簽： Asynchronous com www Machine

  上傳時(shí)間： 2013-12-06

  上傳用戶：xjz632

• state Machine working with rtos免費(fèi)下載

  資源簡(jiǎn)介：state Machine working with rtos

  標(biāo)簽： Machine working state rtos

  上傳時(shí)間： 2013-12-13

  上傳用戶：woshiayin

• This a state-Machine driven rs232 serial port interface to a "Wishbone" // type of bus.免費(fèi)下載

  資源簡(jiǎn)介：This a state-Machine driven rs232 serial port interface to a "Wishbone" // type of bus.

  標(biāo)簽： state-Machine interface Wishbone driven

  上傳時(shí)間： 2014-01-13

  上傳用戶：ippler8

• This a state-Machine driven rs232 serial port interface to aes_core免費(fèi)下載

  資源簡(jiǎn)介：This a state-Machine driven rs232 serial port interface to aes_core

  標(biāo)簽： state-Machine interface aes_core driven

  上傳時(shí)間： 2014-01-22

  上傳用戶：exxxds

• Capacity and Random-Coding Exponents for Channel Coding with Side Information （P.moulin關(guān)于信息隱藏容量的論文免費(fèi)下載

  資源簡(jiǎn)介：Capacity and Random-Coding Exponents for Channel Coding with Side Information （P.moulin關(guān)于信息隱藏容量的論文2006年）

  標(biāo)簽： Random-Coding Information Exponents Capacity

  上傳時(shí)間： 2013-12-19

  上傳用戶：cc1

• Comments on the MISRA Coding guidelines for C免費(fèi)下載

  資源簡(jiǎn)介：Comments on the MISRA Coding guidelines for C

  標(biāo)簽： guidelines Comments Coding MISRA

  上傳時(shí)間： 2013-11-28

  上傳用戶：heart520beat