High-Speed, Low-Power Dual Operational Amplifier The AD826 features high output current drive capability of 50 mA min per amp, and is able to drive unlimited capacitive loads. With a low power supply current of 15 mA max for both amplifiers, the AD826 is a true general purpose operational amplifier. The AD826 is ideal for power sensitive applications such as video cameras and portable instrumentation. The AD826 can operate from a single +5 V supply, while still achieving 25 MHz of band width. Furthermore the AD826 is fully specified from a single +5 V to ±15 V power supplies. The AD826 excels as an ADC/DAC buffer or active filter in data acquisition systems and achieves a settling time of 70 ns to 0.01%, with a low input offset voltage of 2 mV max. The AD826 is available in small 8-lead plastic mini-DIP and SO packages.
上傳時(shí)間： 2020-04-19
上傳用戶：su1254
lm75A溫度數(shù)字轉(zhuǎn)換器 FPGA讀寫實(shí)驗(yàn)Verilog邏輯源碼Quartus工程文件+文檔資料,FPGA為CYCLONE4系列中的EP4CE6E22C8. 完整的工程文件，可以做為你的學(xué)習(xí)設(shè)計(jì)參考。LM75A 是一個(gè)使用了內(nèi)置帶隙溫度傳感器和模數(shù)轉(zhuǎn)換技術(shù)的溫度數(shù)字轉(zhuǎn)換器。它也是一個(gè)溫度檢測(cè)器，可提供一個(gè)過(guò)熱檢測(cè)輸出。LM75A 包含許多數(shù)據(jù)寄存器：配置寄存器用來(lái)存儲(chǔ)器件的某些配置，如器件的工作模式、OS 工作模式、OS 極性和OS 故障隊(duì)列等（在功能描述一節(jié)中有詳細(xì)描述）；溫度寄存器（Temp），用來(lái)存儲(chǔ)讀取的數(shù)字溫度；設(shè)定點(diǎn)寄存器（Tos & Thyst），用來(lái)存儲(chǔ)可編程的過(guò)熱關(guān)斷和滯后限制，器件通過(guò)2 線的串行I2C 總線接口與控制器通信。LM75A 還包含一個(gè)開(kāi)漏輸出（OS），當(dāng)溫度超過(guò)編程限制的值時(shí)該輸出有效。LM75A 有3 個(gè)可選的邏輯地址管腳，使得同一總線上可同時(shí)連接8個(gè)器件而不發(fā)生地址沖突。LM75A 可配置成不同的工作條件。它可設(shè)置成在正常工作模式下周期性地對(duì)環(huán)境溫度進(jìn)行監(jiān)控或進(jìn)入關(guān)斷模式來(lái)將器件功耗降至最低。OS 輸出有2 種可選的工作模式：OS 比較器模式和OS 中斷模式。OS 輸出可選擇高電平或低電平有效。故障隊(duì)列和設(shè)定點(diǎn)限制可編程，為了激活OS 輸出，故障隊(duì)列定義了許多連續(xù)的故障。溫度寄存器通常存放著一個(gè)11 位的二進(jìn)制數(shù)的補(bǔ)碼，用來(lái)實(shí)現(xiàn)0.125℃的精度。這個(gè)高精度在需要精確地測(cè)量溫度偏移或超出限制范圍的應(yīng)用中非常有用。正常工作模式下，當(dāng)器件上電時(shí)，OS 工作在比較器模式，溫度閾值為80℃，滯后75℃，這時(shí)，LM75A就可用作一個(gè)具有以上預(yù)定義溫度設(shè)定點(diǎn)的獨(dú)立的溫度控制器。module LM75_SEG_LED ( //input input sys_clk ,input sys_rst_n ,inout sda_port ,//output output wire seg_c1 ,output wire seg_c2 ,output wire seg_c3 ,output wire seg_c4 ,output reg seg_a ,output reg seg_b ,output reg seg_c ,output reg seg_e ,output reg seg_d ,output reg seg_f ,output reg seg_g ,output reg seg_h , output reg clk_sclk );//parameter define parameter WIDTH = 8;parameter SIZE = 8;//reg define reg [WIDTH-1:0] counter ;reg [9:0] counter_div ;reg clk_50k ;reg clk_200k ;reg sda ;reg enable ;
標(biāo)簽： lm75a 數(shù)字轉(zhuǎn)換器 fpga verilog
上傳時(shí)間： 2021-10-27
上傳用戶：
FPGA讀寫SD卡讀取BMP圖片通過(guò)LCD顯示例程實(shí)驗(yàn) Verilog邏輯源碼Quartus工程文件+文檔說(shuō)明,FPGA型號(hào)Cyclone4E系列中的EP4CE6F17C8，Quartus版本17.1。1 實(shí)驗(yàn)簡(jiǎn)介在前面的實(shí)驗(yàn)中我們練習(xí)了 SD 卡讀寫，VGA 視頻顯示等例程，本實(shí)驗(yàn)將 SD 卡里的 BMP 圖片讀出，寫入到外部存儲(chǔ)器，再通過(guò) VGA、LCD 等顯示。本實(shí)驗(yàn)如果通過(guò)液晶屏顯示，需要有液晶屏模塊。2 實(shí)驗(yàn)原理在前面的實(shí)驗(yàn)中我們?cè)?VGA、LCD 上顯示的是彩條，是 FPGA 內(nèi)部產(chǎn)生的數(shù)據(jù)，本實(shí)驗(yàn)將彩條替換為 SD 內(nèi)的 BMP 圖片數(shù)據(jù)，但是 SD 卡讀取速度遠(yuǎn)遠(yuǎn)不能滿足顯示速度的要求，只能先寫入外部高速 RAM，再讀出后給視頻時(shí)序模塊顯示module top( input clk, input rst_n, input key1, output [5:0] seg_sel, output [7:0] seg_data, output vga_out_hs, //vga horizontal synchronization output vga_out_vs, //vga vertical synchronization output[4:0] vga_out_r, //vga red output[5:0] vga_out_g, //vga green output[4:0] vga_out_b, //vga blue output sd_ncs, //SD card chip select (SPI mode) output sd_dclk, //SD card clock output sd_mosi, //SD card controller data output input sd_miso, //SD card controller data input output sdram_clk, //sdram clock output sdram_cke, //sdram clock enable output sdram_cs_n, //sdram chip select output sdram_we_n, //sdram write enable output sdram_cas_n, //sdram column address strobe output sdram_ras_n, //sdram row address strobe output[1:0] sdram_dqm, //sdram data enable output[1:0] sdram_ba, //sdram bank address output[12:0] sdram_addr, //sdram address inout[15:0] sdram_dq //sdram data);parameter MEM_DATA_BITS = 16 ; //external memory user interface data widthparameter ADDR_BITS = 24
標(biāo)簽： fpga
上傳時(shí)間： 2021-10-27
上傳用戶：
MAX30102芯片心率血氧傳感器模塊傳感器模塊軟硬件設(shè)計(jì)資料包括STM32測(cè)試源碼AD設(shè)計(jì)原理圖及心率及血氧參考設(shè)計(jì)資料:參考代碼及實(shí)驗(yàn)數(shù)據(jù)工程文件及庫(kù)心率及血氧參考設(shè)計(jì)資料芯片數(shù)據(jù)手冊(cè)1771.pdf2ES Teck PEMS White Paper.pdf31930_accessories.pdf5273c08fe2b6b_1_4264142A_EN_p.pdfAvant 2120 Brochure.pdfcelyon-1057-daeg.pdfDr. Bob case study for dental.pdfenvitec.pdfgclarke-2015-MASc-thesis.pdfiadt02i4p261.pdfIHE_PCD_Suppl_POI.pdfijcsit2014050679.pdfIMECS2009_pp1537-1540.pdfLuksSwensonPulseOximetryatHighAltitude.pdfMI_CCHD_Screener_Tips_Flier_3-21-13_422078_7.pdfMoon.pdfnotes6.pdfpansw_spo2_sensor.pdfPK_EN_MAsimo2008Product Catalog.pdfpm-60a-spo2-report-4.pdfpulse-oximetry-at-home.pdfpulse-oximetry.pdfpulse.pdfPulseOxFinal_low.pdfpulse_ox.pdfpxc3976461.pdfReusable SpO2 Sensors.pdfSP02-cross-reference-sensor.pdfsprt533.pdfsszb140.pdfview.pdf
標(biāo)簽： max30102 芯片 心率血氧傳感器 stm32
上傳時(shí)間： 2021-11-24
上傳用戶：fliang
基于FPGA設(shè)計(jì)的sdram讀寫測(cè)試實(shí)驗(yàn)Verilog邏輯源碼Quartus工程文件+文檔說(shuō)明，DRAM選用海力士公司的 HY57V2562 型號(hào),容量為的 256Mbit,采用了 54 引腳的TSOP 封裝, 數(shù)據(jù)寬度都為 16 位, 工作電壓為 3.3V,并丏采用同步接口方式所有的信號(hào)都是時(shí)鐘信號(hào)。FPGA型號(hào)Cyclone4E系列中的EP4CE6F17C8，Quartus版本17.1。timescale 1ps/1psmodule top(input clk,input rst_n,output[1:0] led,output sdram_clk, //sdram clockoutput sdram_cke, //sdram clock enableoutput sdram_cs_n, //sdram chip selectoutput sdram_we_n, //sdram write enableoutput sdram_cas_n, //sdram column address strobeoutput sdram_ras_n, //sdram row address strobeoutput[1:0] sdram_dqm, //sdram data enable output[1:0] sdram_ba, //sdram bank addressoutput[12:0] sdram_addr, //sdram addressinout[15:0] sdram_dq //sdram data);parameter MEM_DATA_BITS = 16 ; //external memory user interface data widthparameter ADDR_BITS = 24 ; //external memory user interface address widthparameter BUSRT_BITS = 10 ; //external memory user interface burst widthparameter BURST_SIZE = 128 ; //burst sizewire wr_burst_data_req; // from external memory controller,write data request ,before data 1 clockwire wr_burst_finish; // from external memory controller,burst write finish
標(biāo)簽： fpga sdram verilog quartus
上傳時(shí)間： 2021-12-18
上傳用戶：
verilog實(shí)現(xiàn)I2C通信的slave模塊源碼狀態(tài)機(jī)設(shè)位計(jì)可做I2C接口的仿真模型//`timescale 1ns/1psmodule I2C_slv (input [6:0] slv_id,input RESET,input scl_i, //I2C clkinput sda_i, //I2C data ininput [7:0] I2C_RDDATA,////////////////////////output reg sda_o, //I2C data outoutput reg reg_w, //reg write enable pulse (1T of scl_i)output reg [7:0] I2C_ADDR,output reg [7:0] I2C_DATA); parameter ST_ADDR = 4'd0; parameter ST_ACK = 4'd1; parameter ST_WDATA1 = 4'd2; parameter ST_WACK1 = 4'd3; parameter ST_WDATA2 = 4'd4; parameter ST_WACK2 = 4'd5; parameter ST_WDATA3 = 4'd6; parameter ST_WACK3 = 4'd7; parameter ST_RDATA1 = 4'd8; parameter ST_RACK1 = 4'd9; parameter ST_IDLE = 4'd15;//---------------------------------------------------------------------------// Signal Declaration//--------------------------------------------------------------------------- reg i2c_start_n, i2c_stop_n; //wire RESET_scl; wire i2c_stp_n, i2c_RESET; reg [3:0] i2c_cs, i2c_ns; reg [3:0] cnt_bit; reg [7:0] d_vec; reg i2c_rd, i2c_ack; reg [7:0] I2C_RDDATA_latch;
標(biāo)簽： verilog i2c 通信 slave
上傳時(shí)間： 2022-02-03
上傳用戶：
The PW2228A is a high efficiency single inductor Buck-Boost converter which can supply theload current up to 1.5A. It provides auto-transition between Buck and Boost Mode. The PW2228Aoperates at 2.4MHz switching frequency in CCM. DC/DC converter operates at Pulse-Skipping Modeat light load. The output voltage is programmable using an external resistor divider, or is fixed to3.3V internally. The load is disconnected from the VIN during shutdown.The PW2228A is available in TDFN3X3-10 package.
標(biāo)簽： pw2228a
上傳時(shí)間： 2022-02-11
上傳用戶：
本系統(tǒng)采用電動(dòng)機(jī)電樞供電回路串接采樣電阻的方式來(lái)實(shí)現(xiàn)對(duì)小型直流有刷電動(dòng)機(jī)的轉(zhuǎn)速測(cè)量。該系統(tǒng)主要由二階低通濾波電路,小信號(hào)放大電路、單片機(jī)測(cè)量顯示電路、開(kāi)關(guān)穩(wěn)壓電源電路等組成。同時(shí)自制電機(jī)測(cè)速裝置,用高頻磁環(huán)作為載體,用線圈繞制磁環(huán),利用電磁感應(yīng)原理檢測(cè)電機(jī)運(yùn)行時(shí)的漏磁,將變化的磁場(chǎng)信號(hào)轉(zhuǎn)化為磁環(huán)上的感應(yīng)電流。用信號(hào)處理單元電路將微弱電信號(hào)轉(zhuǎn)化為脈沖信號(hào),送由單片機(jī)檢測(cè),從而達(dá)到準(zhǔn)確測(cè)量電機(jī)的速度的要求。In this system, the sampling resistance of armature power supply circuit is connected in series to measure the speed of small DC brush motor. The system is mainly composed of second-order low-pass filter circuit, small signal amplifier circuit, single-chip measurement and display circuit, switching regulated power supply circuit and so on. At the same time, the self-made motor speed measuring device uses high frequency magnetic ring as the carrier, coil winding magnetic ring, and electromagnetic induction principle to detect the leakage of magnetic field during the operation of the motor, which converts the changed magnetic field signal into the induced current on the magnetic ring. The weak electric signal is transformed into pulse signal by signal processing unit circuit, which is sent to single chip computer for detection, so as to meet the requirement of accurate measurement of motor speed.
標(biāo)簽： 直流電動(dòng)機(jī)
上傳時(shí)間： 2022-03-26
上傳用戶：
以AT89S52單片機(jī)為控制核心,采用電容降壓技術(shù),Buck電路拓?fù)?PWM驅(qū)動(dòng)模塊和功率器件散熱設(shè)計(jì),通過(guò)高速的數(shù)據(jù)采集、主功率輸入輸出模塊和控制模塊,設(shè)計(jì)一種新型智能車載充電器.在充電過(guò)程中,通過(guò)負(fù)脈沖瞬間放電實(shí)現(xiàn)對(duì)鉛酸蓄電池的再生修復(fù),提高電池的有效容量,延長(zhǎng)使用壽命.該充電器體積小、速度快、效率高、可靠性好.With AT89S52 single chip computer as the control core,a new type of intelligent car-carried charger was designed by using capacitance step-down technology,Buck circuit topology,PWM driving module and power device heat dissipation design,through high-speed data acquisition,main power input and output module and control module.In the charging process,the regeneration and repair of lead-acid batteries are realized by instantaneous discharge of negative pulse,which improves the effective capacity of batteries and prolongs their service life.The charger has the advantages of small size,fast speed,high efficiency and good reliability.
標(biāo)簽： 車載充電器
上傳時(shí)間： 2022-03-27
上傳用戶：
本文設(shè)計(jì)了一種磁致伸縮位移傳感器,介紹了該磁致伸縮位移傳感器的測(cè)量原理,通過(guò)結(jié)構(gòu)優(yōu)化設(shè)計(jì)提高了儀器的性能,詳述了硬件電路設(shè)計(jì)及實(shí)現(xiàn)方法,完成了軟件設(shè)計(jì),實(shí)現(xiàn)了高壓充電、問(wèn)詢脈沖加載、時(shí)間測(cè)量及濾波等功能,并通過(guò)實(shí)驗(yàn)對(duì)其性能進(jìn)行了驗(yàn)證。所研制的磁致伸縮位移傳感器具有測(cè)量精度高、長(zhǎng)期穩(wěn)定性好等特點(diǎn),滿足了大量程、高精度、惡劣環(huán)境等測(cè)量的要求。A kind of sensor based on magnetostrictive principle is designed.The measuring principle of the magnetostrictive displacement sensor is introduced,the performance of the instrument is improved by the structural optimization design,and introduced the hardware circuit design and the realization method,completed the software design,realized the functions of the high voltage charging,inquiries pulse loading,time measurement and filtering,and its performance is verified through the experiment.The magnetostrictive displacement sensor has the characteristics of high measuring precision.The sensor meets the requirements of large range,high precision,poor environment and so on.
標(biāo)簽： 位移傳感器
上傳時(shí)間： 2022-04-06
上傳用戶：
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