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problem-solving

  • 基于ADuC841的膜片鉗放大器系統(tǒng)設(shè)計(jì)

    為降低成本和解決現(xiàn)有膜片鉗放大器系統(tǒng)中PC機(jī)的干擾問題,研究了一種基于單片機(jī)的膜片鉗放大器小系統(tǒng)。該系統(tǒng)采用ADI公司生產(chǎn)的ADuC841作為控制核心,并且配置相應(yīng)的液晶顯示模塊LCM3202401。模擬電路部分采用高輸入阻抗的AD8627實(shí)現(xiàn)微電流信號的采集,并由后級電路進(jìn)行信號的放大和電阻電容的補(bǔ)償。它具有硬件電路簡單、體積小、使用方便的特點(diǎn)。既可以單獨(dú)作為小系統(tǒng)實(shí)現(xiàn)采集和顯示,也可以通過紅外方式和PC機(jī)進(jìn)行通訊,在PC機(jī)上進(jìn)行信號的處理。 Abstract:  In order to reduce cost and resolve the interferential problem with PC in existing patch clamp amplifiers, a small patch clamp amplifier system design based on microcontroller is studied. It adopts a new high performance microconverter ADuC841 by the ADI as the control core in the system, configuring a liquid crystal module LCM3202401. In the analog circuit, AD8627 with high input impedance is used to detect the low current,signal magnification, as well as resistance and capacitance compensation are accomplished by subsequent circuits. It has the advantage of simple hardware circuit design, small volume and convenient operation. It can either be used as an independent system to measure and show signal detected or transmit to PC by infrared ray.

    標(biāo)簽: ADuC 841 膜片鉗 放大器

    上傳時間: 2013-11-06

    上傳用戶:yy_cn

  • 無傳感器BLDCM位置檢測的一種單片機(jī)軟件實(shí)現(xiàn)方法

    針對無位置傳感器無刷直流電機(jī)的位置檢測問題,本文應(yīng)用單片機(jī)成功地實(shí)現(xiàn)了一種軟件檢測方法,并給出了實(shí)測波形加以驗(yàn)證。關(guān)鍵詞: 無刷直流電機(jī) 無傳感器 位置檢測Abstract: As to the position-detecting problem of sensorless brushless DC motor, a softwarerealization by microcomputer is proposed successfully in the paper. Experiment results are also presented to verify the method.Keywords: brushless DC motor, sensorless, position detecting

    標(biāo)簽: BLDCM 無傳感器 位置檢測 單片機(jī)軟件

    上傳時間: 2013-11-01

    上傳用戶:aappkkee

  • MATLAB與PSpice數(shù)據(jù)接口技術(shù)

    摘 要 瞬態(tài)仿真領(lǐng)域的許多工作需要獲得可視化數(shù)據(jù), 仿真電路不能將輸出參數(shù)繪制成圖形時研究工作將受到很大影響. 而權(quán)威電路仿真軟件PSpice 在這個方面不盡如人意. 本文提出了一種有效的解決辦法: 通過MATLAB 編程搭建一個PSpice 與MATLAB 的數(shù)據(jù)接口,使PSpice輸出數(shù)據(jù)文件可以導(dǎo)入到MATLAB中繪制圖形. 這令我們能夠很方便地獲得數(shù)據(jù)的規(guī)律以有效地分析仿真結(jié)果, 這項(xiàng)技術(shù)對于教學(xué)和工程實(shí)踐都有比較實(shí)際的幫助.關(guān)鍵詞: 瞬態(tài)仿真 仿真程序 PSpice MATLAB 可視化數(shù)據(jù)The Data Transfer from Pspice to MATLABWu hao Ning yuanzhong Liang yingAbstract Many works in the area of transient simulation has shown how a emulator such asPSpice can be interfaced to an control analysis package such as MATLAB to get viewdata. Thepaper describes how such interfaces can be made using the MATLAB programming. The platformas a typical platform will solve the problem that PSpice software sometimes can not draw the datato a picture. It can make us find the rule from numerous data very expediently, so we can analyzethe outcome of the simulation. And it also can be used in the field of education.Keywords Transient Simulation Emulator PSpice MATLAB Viewdata1 引言科學(xué)研究和工程應(yīng)用常需要進(jìn)行電路仿真 PSpice可進(jìn)行直流 交流 瞬態(tài)等基本電路特性分析 也可進(jìn)行蒙托卡諾 MC 統(tǒng)計(jì)分析 最壞情況 Wcase 分析 優(yōu)化設(shè)計(jì)等復(fù)雜電路特性分析 它是國際上仿真電路的權(quán)威軟件 而MATLAB的主要特點(diǎn)有 高效方便的矩陣和數(shù)組運(yùn)算 編程效率高 結(jié)構(gòu)化面向?qū)ο?方便的繪圖功能 用戶使用方便 工具箱功能強(qiáng)大 兩者各有著重點(diǎn) 兩種軟件結(jié)合應(yīng)用 對研究工作有很重要的意義香港理工大學(xué)Y. S. LEE 等人首先將PSpice和MATLAB結(jié)合 開發(fā)了電力電子電路優(yōu)化用的CAD 程序MATSPICE[6] 將兩者相結(jié)合的關(guān)鍵在于 如何用MATLAB 獲取PSpice的仿真數(shù)據(jù) 對此參考文獻(xiàn) 6 里沒有詳細(xì)敘述 本文著重說明用MATLAB 讀取PSpice仿真數(shù)據(jù)的具體方法本論文利用MATLAB對PSpice仿真出的數(shù)據(jù)處理繪制出后者無法得到或是效果不好的仿真圖形 下面就兩者結(jié)合使用的例子 進(jìn)行具體說明

    標(biāo)簽: MATLAB PSpice 數(shù)據(jù) 接口技術(shù)

    上傳時間: 2013-10-20

    上傳用戶:wuchunzhong

  • 通信的數(shù)學(xué)理論

    The fundamental problem of communication is that of reproducing at one point either exactly or approximately a message selected at another point. Frequently the messages have meaning; that is they refer to or are correlated according to some system with certain physical or conceptual entities.

    標(biāo)簽: 通信

    上傳時間: 2013-10-31

    上傳用戶:liuxinyu2016

  • PLD對FPGA數(shù)據(jù)加密

    SRAM-based FPGAs are non-volatile devices. Upon powerup, They are required to be programmed from an external source. This procedure allows anyone to easily monitor the bit-stream, and clone the device. The problem then becomes how can you effectively protect your intellectual property from others in an architecture where the part is externally programmed?

    標(biāo)簽: FPGA PLD 數(shù)據(jù)加密

    上傳時間: 2013-11-06

    上傳用戶:wl9454

  • 基于FPGA的光纖光柵解調(diào)系統(tǒng)的研究

     波長信號的解調(diào)是實(shí)現(xiàn)光纖光柵傳感網(wǎng)絡(luò)的關(guān)鍵,基于現(xiàn)有的光纖光柵傳感器解調(diào)方法,提出一種基于FPGA的雙匹配光纖光柵解調(diào)方法,此系統(tǒng)是一種高速率、高精度、低成本的解調(diào)系統(tǒng),并且通過引入雙匹配光柵有效地克服了雙值問題同時擴(kuò)大了檢測范圍。分析了光纖光柵的測溫原理并給出了該方案軟硬件設(shè)計(jì),綜合考慮系統(tǒng)的解調(diào)精度和FPGA的處理速度給出了基于拉格朗日的曲線擬合算法。 Abstract:  Sensor is one of the most important application of the fiber grating. Wavelength signal demodulating is the key techniques to carry out fiber grating sensing network, based on several existing methods of fiber grating sensor demodulation inadequate, a two-match fiber grating demodulation method was presented. This system is a high-speed, high precision, low-cost demodulation system. And by introducing a two-match grating effectively overcomes the problem of double value while expands the scope of testing. This paper analyzes the principle of fiber Bragg grating temperature and gives the software and hardware design of the program. Considering the system of demodulation accuracy and processing speed of FPGA,this paper gives the curve fitting algorithm based on Lagrange.

    標(biāo)簽: FPGA 光纖光柵 解調(diào)系統(tǒng)

    上傳時間: 2014-07-24

    上傳用戶:caiguoqing

  • 8051VHDL代碼

    8051參考設(shè)計(jì),與其他8051的免費(fèi)IP相比,文檔相對較全,Oregano System 提供 This is version 1.3 of the MC8051 IP core. September 2002: Oregano Systems - Design & Consulting GesmbH Change history: - Improved tb_mc8051_siu_sim.vhd to verify duplex operation. - Corrected problem with duplex operation in file   mc8051_siu_rtl.vhd

    標(biāo)簽: 8051 VHDL 代碼

    上傳時間: 2014-12-28

    上傳用戶:tb_6877751

  • 怎樣使用Nios II處理器來構(gòu)建多處理器系統(tǒng)

    怎樣使用Nios II處理器來構(gòu)建多處理器系統(tǒng) Chapter 1. Creating Multiprocessor Nios II Systems Introduction to Nios II Multiprocessor Systems . . . . . . . . . . . . . . 1–1 Benefits of Hierarchical Multiprocessor Systems  . . . . . . . . . . . . . . . 1–2 Nios II Multiprocessor Systems . . . . . . . . . . . . . . . . . . . .  . . . . . . . . . . . . . 1–2 Multiprocessor Tutorial Prerequisites   . . . . . . . . . . .  . . . . . . . . . . . . 1–3 Hardware Designs for Peripheral Sharing   . . . . . . . . . . . .. . . . . . . . 1–3 Autonomous Multiprocessors   . . . . . . . . . . . . . . . . . . . . . .  . . . . . . . 1–3 Multiprocessors that Share Peripherals . . . . . . . . . . . . . . . . . . . . . . 1–4 Sharing Peripherals in a Multiprocessor System   . . . . . . . . . . . . . . . . . 1–4 Sharing Memory  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–6 The Hardware Mutex Core  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . 1–7 Sharing Peripherals   . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . . . . . 1–8 Overlapping Address Space  . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . . . 1–8 Software Design Considerations for Multiple Processors . . .. . . . . 1–9 Program Memory  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–9 Boot Addresses  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. 1–13 Debugging Nios II Multiprocessor Designs  . . . . . . . . . . . . . . . .  1–15 Design Example: The Dining Philosophers’ Problem   . . . . .. . . 1–15 Hardware and Software Requirements . . . . . . . . . . . . . . . .. . . 1–16 Installation Notes  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–17 Creating the Hardware System   . . . . . . . . . . . . . . .. . . . . . 1–17 Getting Started with the multiprocessor_tutorial_start Design Example   1–17 Viewing a Philosopher System   . . . . . . . . . . . . . . . . . . . . . . . . . . . .  . . 1–18 Philosopher System Pipeline Bridges  . . . . . . . . . . . . . . . . . . . . . 1–19 Adding Philosopher Subsystems   . . . . . . . . . . . . . . . . . . . . . .  . . . . 1–21 Connecting the Philosopher Subsystems  . . . . . . . . . . . . .. . . . . 1–22 Viewing the Complete System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–27 Generating and Compiling the System   . . . . . . . . . . . . . . . . . .. 1–28

    標(biāo)簽: Nios 處理器 多處理器

    上傳時間: 2013-11-21

    上傳用戶:lo25643

  • PLD對FPGA數(shù)據(jù)加密

    SRAM-based FPGAs are non-volatile devices. Upon powerup, They are required to be programmed from an external source. This procedure allows anyone to easily monitor the bit-stream, and clone the device. The problem then becomes how can you effectively protect your intellectual property from others in an architecture where the part is externally programmed?

    標(biāo)簽: FPGA PLD 數(shù)據(jù)加密

    上傳時間: 2013-10-20

    上傳用戶:磊子226

  • 通信的數(shù)學(xué)理論

    The fundamental problem of communication is that of reproducing at one point either exactly or approximately a message selected at another point. Frequently the messages have meaning; that is they refer to or are correlated according to some system with certain physical or conceptual entities.

    標(biāo)簽: 通信

    上傳時間: 2013-11-11

    上傳用戶:xy@1314

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