闡述了軌道交通列車定位技術(shù)。介紹了在軌道交通系統(tǒng)中列車定位技術(shù)的功能，國內(nèi)外軌道交通中主要采用的列車定位方法，重點(diǎn)論述了幾種主要定位技術(shù)，并從定位精度、閉塞制式、維護(hù)投資成本、抗干擾等方面進(jìn)行分析比較。提出目前軌道交通定位技術(shù)應(yīng)綜合運(yùn)用，取長補(bǔ)短，多種方法相互融合，才能滿足軌道交通中對安全可靠性的要求。 Abstract: Rail train positioning technology is described. The paper introduces the funetions of the train positioning technology in the rail transit system， the main methods of train positioning do mestic and international rail， and focuses on several key methods， analyzes and compares from the positioning accuracy， block system, maintenance and investment cost， interference and so on， suggested that the current rail positioning technology should be integrated use of positioning method of meriging， learn from each other， to meet the reliability requirements of rail safety.
上傳時間： 2013-11-25
上傳用戶：franktu
提出了一種以ARM微處理器為控制核心的遠(yuǎn)程無線視頻監(jiān)控終端的設(shè)計(jì)方案，其監(jiān)控終端的硬件設(shè)計(jì)包括視頻采集處理、中央管理控制、無線傳輸3個模塊。并給出了監(jiān)控終端的軟件開發(fā)平臺和開發(fā)模式的系統(tǒng)啟動代碼、嵌入式Linux系統(tǒng)移植以及驅(qū)動程序和應(yīng)用程序。測試結(jié)果表明，該監(jiān)控終端設(shè)計(jì)方案合理、有效，基本滿足監(jiān)控需求。 Abstract: A remote wireless video monitoring terminal design， which uses ARM microprocessor as its core control， is proposed in this paper.The hardware design of monitoring terminal system is composed of the video acquisition and processing module， the central management and control module， wireless transmission module.Meanwhile the monitoring terminal-s software development platform and development patterns are designed. Also the design of the system-s start codes， embedded Linux system-s transplantation process， driver and the corresponding applications are given. The results showed that the monitoring terminal design is reasonable， effective， basically meet monitoring requirements.
標(biāo)簽： ARM 遠(yuǎn)程無線 視頻監(jiān)控 終端設(shè)計(jì)
上傳時間： 2013-11-13
上傳用戶：wanqunsheng
Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.
上傳時間： 2013-11-21
上傳用戶：不懂夜的黑
The Virtex-4 features, such as the programmable IDELAY and built-in FIFO support, simplifythe bridging of a high-speed, PCI-X core to large amounts of DDR-SDRAM memory. Onechallenge is meeting the PCI-X target initial latency specification. PCI-X Protocol Addendum tothe PCI Local Bus Specification Revision 2.0a ([Ref 6]) dictates that when a target signals adata transfer, "the target must do so within 16 clocks of the assertion of FRAME#." PCItermination transactions, such as Split Response/Complete, are commonly used to meet thelatency specifications. This method adds complexity to the design, as well as additional systemlatency. Another solution is to increase the ratio of the memory frequency to the PCI-X busfrequency. However, this solution increases the required power and clock resource usage.
上傳時間： 2013-11-24
上傳用戶：18707733937
The revolution of automation on factory floors is a key driver for the seemingly insatiable demand for higher productivity， lower total cost of ownership，and high safety. As a result， industrial applications drive an insatiable demand of higher data bandwidth and higher system-level performance. This white paper describes the trends and challenges seen by designers and how FPGAs enable solutions to meet their stringent design goals.
標(biāo)簽： xilinx FPGAs 工業(yè) 中的應(yīng)用
上傳時間： 2013-11-08
上傳用戶：yan2267246
The high defi nition multimedia interface (HDMI) is fastbecoming the de facto standard for passing digitalaudio and video data in home entertainment systems.This standard includes an I2C type bus called a displaydata channel (DDC) that is used to pass extended digitalinterface data (EDID) from the sinkdevice (such as adigital TV) to the source device (such as a digital A/Vreceiver). EDID includes vital information on the digitaldata formats that the sink device can accept. The HDMIspecifi cation requires that devices have less than 50pFof input capacitance on their DDC bus lines, which canbe very diffi cult to meet. The LTC®4300A’s capacitancebuffering feature allows devices to pass the HDMI DDCinput capacitance compliance test with ease.
上傳時間： 2013-11-21
上傳用戶：tian126vip
從空格(ASCII碼32)到~(ASCII碼126)。表內(nèi)的第一行與表頭相同，下面的每一行都與上一行的內(nèi)容相同，只是字符相左移動了一個位置。這樣，下一行的最后一個字符與上一行的第一個字符相同。 為了進(jìn)行文本編碼，可以任意選擇一個字符串，稱之為編碼字符串，也就是常說的密鑰。為解釋編碼方法，我們假設(shè)密鑰是Walrus，待編碼的文本（即常說的明文）是： meet me in St. Louis 我們在待編碼的文本之上重復(fù)書寫上述密鑰，使得其長度與待編碼文本相同： WalrusWalrusWalrusWa meet me in St. Louis 從上述兩行文本中按列對應(yīng)方式依次提取一個字符，可得到多個字符對：WM、ae、le等，這些字符對可用作上表的索引。這樣，依次以這些字符對作為索引可從上表查到一系列字符，這些字符就構(gòu)成了文本編碼，即常說的密文。例如，第W行第M列隊(duì)?wèi)?yīng)得字符是%，因此編碼的第一個字符就是%；第a行第e列對應(yīng)的字符是G；第l行第e列對應(yīng)的是R。依次進(jìn)行上述查找操作，可以得到完整的密文 %Grgua=aVauGLol?eiAU 進(jìn)行相反的操作就可對該文本解碼。 編寫編碼/解碼程序，可以對文本文件或鍵盤輸入的字符串進(jìn)行編碼/解碼，在選擇編碼解碼后，需要提示用戶輸入密鑰。
上傳時間： 2014-01-16
上傳用戶：Ants
The Personal Software Process (PSP) shows engineers how to: 1)manage the quality of their projects 2)make commitments they can meet 3)improve estimating and planning 4)reduce defects in their products
標(biāo)簽： engineers Personal Software projects
上傳時間： 2014-12-05
上傳用戶：Avoid98
PCI-to-PCI Bridge Architecture Specification Revision 1.1 This specification establishes the requirements that a PCI-to-PCI bridge must meet to be compliant to this specification and the PCI Local Bus Specification. In addition, the requirements for optional extensions are specified. This specification does not describe the implementation details of any particular requirement or optional feature of a PCI-to-PCI bridge, nor is it a goal of this specification to describe any particular PCI-to-PCI bridge implementation. However, some recommendations are provided for some implementation-specific features that can be provided by a PCI-to-PCI bridge.
標(biāo)簽： Specification specification Architecture establishes
上傳時間： 2014-01-14
上傳用戶：caiiicc
Introduction to the MSN Messenger Activity SDK --- --- --- --- --- --- --- --- --- --- --- --- --- -- The MSN® Messenger Activity software development kit (SDK) contains technical information about how to develop and test single-user and multiuser applications by using the Activity object model. The SDK also provides detailed information about the MSN development and testing requirements that your Activity must meet, and how to increase the usage of your MSN Messenger Activity application.
標(biāo)簽： Introduction Messenger Activity the
上傳時間： 2015-09-06
上傳用戶：ruan2570406
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