亚洲欧美第一页_禁久久精品乱码_粉嫩av一区二区三区免费野_久草精品视频

蟲蟲首頁(yè)| 資源下載| 資源專輯| 精品軟件
登錄| 注冊(cè)

latched

  • Event counter for MSP430 - multi channel and real fast using latched interrupts.

    Event counter for MSP430 - multi channel and real fast using latched interrupts.

    標(biāo)簽: interrupts counter channel latched

    上傳時(shí)間: 2014-01-22

    上傳用戶:四只眼

  • vhdl編寫

    vhdl編寫,8b—10b 編解碼器設(shè)計(jì) Encoder: 8b/10b Encoder (file: 8b10b_enc.vhd) Synchronous clocked inputs (latched on each clock rising edge) 8-bit parallel unencoded data input KI input selects data or control encoding Asynchronous active high reset initializes all logic Encoded data output 10-bit parallel encoded output valid 1 clock later Decoder: 8b/10b Decoder (file: 8b10b_dec.vhd) Synchronous clocked inputs (latched on each clock rising edge) 10-bit parallel encoded data input Asynchronous active high reset initializes all logic Decoded data, disparity and KO outputs 8-bit parallel unencoded output valid 1 clock later

    標(biāo)簽: vhdl 編寫

    上傳時(shí)間: 2016-05-05

    上傳用戶:gundamwzc

  • Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGH

    Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.

    標(biāo)簽: SHIFTER name module Input

    上傳時(shí)間: 2013-12-13

    上傳用戶:himbly

  • Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGH

    Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.

    標(biāo)簽: SHIFTER name module Input

    上傳時(shí)間: 2014-01-20

    上傳用戶:三人用菜

  • The SL74HC573 is identical in pinout to the LS/ALS573. The device inputs are compatible with standa

    The SL74HC573 is identical in pinout to the LS/ALS573. The device inputs are compatible with standard CMOS outputs with pullup resistors, they are compatible with LS/ALSTTL outputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. When Latch Enable goes low, data meeting the setup and hold time becomes latched.

    標(biāo)簽: compatible The 573 identical

    上傳時(shí)間: 2016-12-29

    上傳用戶:變形金剛

主站蜘蛛池模板: 启东市| 山西省| 邛崃市| 池州市| 特克斯县| 青浦区| 南华县| 资兴市| 寿阳县| 桐庐县| 馆陶县| 池州市| 水城县| 平远县| 临猗县| 娄烦县| 龙山县| 徐闻县| 内江市| 上蔡县| 鞍山市| 轮台县| 星座| 南澳县| 海安县| 昭苏县| 卢氏县| 大名县| 龙口市| 安仁县| 科尔| 丹凤县| 增城市| 辰溪县| 巫山县| 连平县| 博爱县| 安远县| 沛县| 盐津县| 宁都县|