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in-memory

  • Fpga Implementation Of Digital Timing Recovery In Software Radio Receiver

    Fpga Implementation Of Digital Timing Recovery In Software Radio Receiver

    標(biāo)簽: Implementation Recovery Receiver Software

    上傳時間: 2013-09-05

    上傳用戶:panpanpan

  • 在Allegro中等長設(shè)置的高級應(yīng)用-Memory部分等長設(shè)置

    在Allegro中等長設(shè)置的高級應(yīng)用\r\n――Memory部分等長設(shè)置

    標(biāo)簽: Allegro Memory 等長設(shè)置

    上傳時間: 2013-09-06

    上傳用戶:VRMMO

  • FPGA in the software radio

    FPGA in the software radio

    標(biāo)簽: software radio FPGA the

    上傳時間: 2013-09-06

    上傳用戶:lina2343

  • Many CAD users dismiss schematic capture as a necessary evil in the process of creating

    Many CAD users dismiss schematic capture as a necessary evil in the process of creating\r\nPCB layout but we have always disputed this point of view. With PCB layout now offering\r\nautomation of both component placement and track routing, getting the des

    標(biāo)簽: schematic necessary creating dismiss

    上傳時間: 2013-09-25

    上傳用戶:baiom

  • XAPP983-從 Flash存儲器執(zhí)行和調(diào)試軟件

    This document and the associated reference design provide guidance for assigning anddebugging software to or in FLASH memory, specifically for a MicroBlaze™ embeddedprocessor design.

    標(biāo)簽: Flash XAPP 983 存儲器

    上傳時間: 2013-11-11

    上傳用戶:dgann

  • Analog Circuit Design in Porta

    •Founded in Jan. 08, 2001 in Shanghai, China.•Fabless IDH focused on Analog & Mixed Signal Chip design & marketing •Over 100 IC introduced.•Over 200 OEM Customer worldwide•ISO-9000 Certified•Distribution Channel in Taiwan, China & Japan To achieve 100% customer satisfactionby producing the technically advanced product with the best quality, on-time delivery and service. Leverages on proprietary process and world-class engineering team to develop innovative & high quality analog solutions that add value to electronics equipment.

    標(biāo)簽: Circuit Analog Design Porta

    上傳時間: 2013-10-24

    上傳用戶:songnanhua

  • DN384 精確的電源排序,防止系統(tǒng)損壞

      Many complex systems—such as telecom equipment,memory modules, optical systems, networking equipment,servers and base stations—use FPGAs and otherdigital ICs that require multiple voltage rails that muststart up and shut down in a specific order, otherwise theICs can be damaged. The LTC®2924 is a simple andcompact solution to power supply sequencing in a 16-pinSSOP package (see Figures 1 and 2).

    標(biāo)簽: 384 DN 電源排序 防止

    上傳時間: 2013-10-29

    上傳用戶:tonyshao

  • 超級電容器備用電源系統(tǒng)的手持設(shè)備數(shù)據(jù)保護(hù)

      Handheld electronic devices play a key role in our everydaylives. Because dependability is paramount, handhelds arecarefully engineered with lightweight power sources forreliable use under normal conditions. But no amount ofcareful engineering can prevent the mistreatment theywill undergo at the hands of humans. For example, whathappens when a factory worker drops a bar code scanner,causing the battery to pop out? Such events areelectronically unpredictable, and important data storedin volatile memory would be lost without some form ofsafety net—namely a short-term power holdup systemthat stores suffi cient energy to supply standby power untilthe battery can be replaced or the data can be stored inpermanent memory.

    標(biāo)簽: 超級電容器 備用電源 手持設(shè)備

    上傳時間: 2013-11-05

    上傳用戶:coeus

  • [PIC項(xiàng)目實(shí)戰(zhàn):基于PIC18].Advanced.PIC.Microcontroller.Projects.in.C

    [PIC項(xiàng)目實(shí)戰(zhàn):基于PIC18].Advanced.PIC.Microcontroller.Projects.in.C

    標(biāo)簽: PIC Microcontroller Advanced Projects

    上傳時間: 2013-11-21

    上傳用戶:二驅(qū)蚊器

  • C8051F020

    HIGH SPEED 8051 μC CORE - Pipe-lined Instruction Architecture; Executes 70% of Instructions in 1 or 2 System Clocks - Up to 25MIPS Throughput with 25MHz System Clock - 22 Vectored Interrupt Sources MEMORY - 4352 Bytes Internal Data RAM (256 + 4k) - 64k Bytes In-System Programmable FLASH Program Memory - External Parallel Data Memory Interface – up to 5Mbytes/sec DIGITAL PERIPHERALS - 64 Port I/O; All are 5V tolerant - Hardware SMBusTM (I2CTM Compatible), SPITM, and Two UART Serial Ports Available Concurrently - Programmable 16-bit Counter/Timer Array with 5 Capture/Compare Modules - 5 General Purpose 16-bit Counter/Timers - Dedicated Watch-Dog Timer; Bi-directional Reset CLOCK SOURCES - Internal Programmable Oscillator: 2-to-16MHz - External Oscillator: Crystal, RC, C, or Clock - Real-Time Clock Mode using Timer 3 or PCA SUPPLY VOLTAGE ........................ 2.7V to 3.6V - Typical Operating Current: 10mA @ 25MHz - Multiple Power Saving Sleep and Shutdown Modes 100-Pin TQFP (64-Pin Version Available) Temperature Range: –40°C to +85°C

    標(biāo)簽: C8051F020

    上傳時間: 2013-10-12

    上傳用戶:lalalal

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