Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.
上傳時間： 2013-11-21
上傳用戶：不懂夜的黑
One of the strengths of Synplify is the Finite State Machine compiler. This is a powerfulfeature that not only has the ability to automatically detect state machines in the sourcecode, and implement them with either sequential, gray, or one-hot encoding. But alsoperform a reachability analysis to determine all the states that could possibly bereached, and optimize away all states and transition logic that can not be reached.Thus, producing a highly optimal final implementation of the state machine.
標簽： Synplicity Machine Verilog Design
上傳時間： 2013-10-20
上傳用戶：蒼山觀海
數(shù)字與模擬電路設(shè)計技巧IC與LSI的功能大幅提升使得高壓電路與電力電路除外，幾乎所有的電路都是由半導(dǎo)體組件所構(gòu)成，雖然半導(dǎo)體組件高速、高頻化時會有EMI的困擾，不過為了充分發(fā)揮半導(dǎo)體組件應(yīng)有的性能，電路板設(shè)計與封裝技術(shù)仍具有決定性的影響。 模擬與數(shù)字技術(shù)的融合由于IC與LSI半導(dǎo)體本身的高速化，同時為了使機器達到正常動作的目的，因此技術(shù)上的跨越競爭越來越激烈。雖然構(gòu)成系統(tǒng)的電路未必有clock設(shè)計，但是毫無疑問的是系統(tǒng)的可靠度是建立在電子組件的選用、封裝技術(shù)、電路設(shè)計與成本，以及如何防止噪訊的產(chǎn)生與噪訊外漏等綜合考慮。機器小型化、高速化、多功能化使得低頻/高頻、大功率信號/小功率信號、高輸出阻抗/低輸出阻抗、大電流/小電流、模擬/數(shù)字電路，經(jīng)常出現(xiàn)在同一個高封裝密度電路板，設(shè)計者身處如此的環(huán)境必需面對前所未有的設(shè)計思維挑戰(zhàn)，例如高穩(wěn)定性電路與吵雜(noisy)性電路為鄰時，如果未將噪訊入侵高穩(wěn)定性電路的對策視為設(shè)計重點，事后反復(fù)的設(shè)計變更往往成為無解的夢魘。模擬電路與高速數(shù)字電路混合設(shè)計也是如此，假設(shè)微小模擬信號增幅后再將full scale 5V的模擬信號，利用10bit A/D轉(zhuǎn)換器轉(zhuǎn)換成數(shù)字信號，由于分割幅寬祇有4.9mV，因此要正確讀取該電壓level并非易事，結(jié)果造成10bit以上的A/D轉(zhuǎn)換器面臨無法順利運作的窘境。另一典型實例是使用示波器量測某數(shù)字電路基板兩點相隔10cm的ground電位，理論上ground電位應(yīng)該是零，然而實際上卻可觀測到4.9mV數(shù)倍甚至數(shù)十倍的脈沖噪訊(pulse noise)，如果該電位差是由模擬與數(shù)字混合電路的grand所造成的話，要測得4.9 mV的信號根本是不可能的事情，也就是說為了使模擬與數(shù)字混合電路順利動作，必需在封裝與電路設(shè)計有相對的對策，尤其是數(shù)字電路switching時，ground vance noise不會入侵analogue ground的防護對策，同時還需充分檢討各電路產(chǎn)生的電流回路(route)與電流大小，依此結(jié)果排除各種可能的干擾因素。以上介紹的實例都是設(shè)計模擬與數(shù)字混合電路時經(jīng)常遇到的瓶頸，如果是設(shè)計12bit以上A/D轉(zhuǎn)換器時，它的困難度會更加復(fù)雜。
上傳時間： 2014-02-12
上傳用戶：wenyuoo
高進制調(diào)制中，Gray碼映射之后，收端進行的軟解映射程序。解映射之后的軟信息，可直接用于譯碼
上傳時間： 2014-01-18
上傳用戶：zxc23456789
A program to demonstrate the optimization process of ant colony optimization for the traveling saleman problem (TSP). The cities are shown as red circles, the pheromone on the connections between them (fully connected graph) by gray lines. The darker the grey, the more pheromone is currently on the edge. During the optimization, the currently best found tour is drawn in red. To run the optimization, first create a random TSP, then create an ant colony, and finally run the optimization.
標簽： optimization demonstrate the traveling
上傳時間： 2015-07-12
上傳用戶：偷心的海盜
GMVQ算法，stanford大學(xué)Gray先生經(jīng)典之作
上傳時間： 2014-11-29
上傳用戶：天誠24
The extraordinary growth of the World Wide Web has been fueled by the ability it gives authors to easily and cheaply distribute electronic documents to an international audience. As Web documents have become larger and more complex, however, Web content providers have begun to experience the limitations of a medium that does not provide the extensibility, structure, and data checking needed for large-scale commercial publishing. The ability of Java applets to embed powerful data manipulation capabilities in Web clients makes even clearer the limitations of current methods for the transmittal of document data.
標簽： extraordinary the ability authors
上傳時間： 2015-08-11
上傳用戶：ANRAN
This code was used for making the practical measurements in section 2.3 of my thesis. This Matlab code allows an OFDM signal to be generated based on an input data file. The data can be random data, a grey scale image, a wave file, or any type of file. The generated OFDM signal is stored as a windows wave file, allowing it to be viewed, listened to and manipulated in other programs. The modified wave file can then be decoded by the receiver software to extract the original data. This code was developed for the experiments that I performed in my honours thesis, and thus has not been fully debugged. This is the original code developed for the thesis and so has several problems with it. The BER performance given by the simulations is infact Symbol Error Rate.
標簽： This measurements practical section
上傳時間： 2015-09-20
上傳用戶：tedo811
240x128 graphic mode/Driver ic:t6963C writed by hawk liu 2001 Aug. 22 1/128 duty 1/12.3 bias Vop=20V STN GRAY Trasflective mode character/Graphic mode demo program
標簽： 240x128 graphic Driver t6963C
上傳時間： 2014-01-13
上傳用戶：lacsx
要用到開發(fā)工具SD-H08，是free scale 的應(yīng)用程序
上傳時間： 2015-09-23
上傳用戶：gyq
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