應用于電動汽車驅動領域的永磁同步電機交流驅動系統是由永磁同步電機、電力電子技術和控制技術相結合而形成的新型交流驅動系統。因其具有良好的運行性能而成為當代電氣傳動領域研究的熱點之一。 永磁同步電機是一個多變量、非線性、高強耦合的系統，其輸出轉矩與定子電流不成正比，而是復雜的函數關系，因此要得到好的控制性能，需要進行磁場解耦。矢量變換控制技術正好適用于永磁同步電機的這種特點。 本文在數字電機控制專用DSP芯片TMS320LF2407的基礎上，以永磁同步電機為研究對象，對其矢量控制技術進行了研究和設計。 首先課題根據永磁同步電機實際物理模型，分析推導得到了永磁同步電機的三相靜止坐標系下及兩相旋轉坐標系下的數學模型。 接著課題對永磁同步電機運行特性進行了分析和研究。在此基礎上，課題提出了一種新型的永磁同步電機矢量控制系統，在這個系統上，課題提出了應用不同矢量控制策略的矢量控制方法，并對其做了仿真驗證。 結果表明，課題設計的系統以及應用不同矢量控制策略的矢量控制方法準確可行。 這個控制系統便于實現多種矢量控制方法，為永磁同步電機擴速增效提供了理論平臺。 在理論分析、仿真通過基礎上，課題對驅動系統的硬件和軟件兩個方面進行了具體的設計。 課題完成了DSP控制系統關鍵硬件電路的設計，并設計制作了一塊應用SCALE模塊的IGBT驅動電路，此驅動電路響應迅速、抗干擾性強，驅動性能優越。此外，課題完成了永磁同步電機矢量控制系統全數字化設計，調試通過了速度位置檢測、電流檢測、PI調節、坐標變換等應用模塊。 課題最后對整個系統的做了全面的總結，并對今后的工作方向進行了展望。
上傳時間： 2013-06-22
上傳用戶：firstbyte
為了克服傳統的局部特征匹配算法對噪聲和圖像灰度非線性變換敏感的不足，提出了基于SIFT（Scale Invariant Feature Transform）描述算子的特征匹配算法。該算法首先
上傳時間： 2013-04-24
上傳用戶：hphh
Abstract: Using a DAC and a microprocessor supervisor, the system safety can be improved in industrial controllers, programmablelogiccontrollers (PLC), and data-acquisition systems. The analog output is set to zero-scale (or pin-programmable midscale) when amicroprocessor failure, optocoupler failure, or undervoltage condition occurs. A simple application is shown on how to implement thisfunction.
上傳時間： 2013-10-17
上傳用戶：sjb555
Differential Nonlinearity: Ideally, any two adjacent digitalcodes correspond to output analog voltages that are exactlyone LSB apart. Differential non-linearity is a measure of theworst case deviation from the ideal 1 LSB step. For example,a DAC with a 1.5 LSB output change for a 1 LSB digital codechange exhibits 1⁄2 LSB differential non-linearity. Differentialnon-linearity may be expressed in fractional bits or as a percentageof full scale. A differential non-linearity greater than1 LSB will lead to a non-monotonic transfer function in aDAC.Gain Error (Full Scale Error): The difference between theoutput voltage (or current) with full scale input code and theideal voltage (or current) that should exist with a full scale inputcode.Gain Temperature Coefficient (Full Scale TemperatureCoefficient): Change in gain error divided by change in temperature.Usually expressed in parts per million per degreeCelsius (ppm/°C).Integral Nonlinearity (Linearity Error): Worst case deviationfrom the line between the endpoints (zero and full scale).Can be expressed as a percentage of full scale or in fractionof an LSB.LSB (Lease-Significant Bit): In a binary coded system thisis the bit that carries the smallest value or weight. Its value isthe full scale voltage (or current) divided by 2n, where n is theresolution of the converter.Monotonicity: A monotonic function has a slope whose signdoes not change. A monotonic DAC has an output thatchanges in the same direction (or remains constant) for eachincrease in the input code. the converse is true for decreasing codes.
標簽： Converters Defini DAC
上傳時間： 2013-10-30
上傳用戶：stvnash
ANALOG INPUT BANDWIDTH is a measure of the frequencyat which the reconstructed output fundamental drops3 dB below its low frequency value for a full scale input. Thetest is performed with fIN equal to 100 kHz plus integer multiplesof fCLK. The input frequency at which the output is −3dB relative to the low frequency input signal is the full powerbandwidth.APERTURE JITTER is the variation in aperture delay fromsample to sample. Aperture jitter shows up as input noise.APERTURE DELAY See Sampling Delay.BOTTOM OFFSET is the difference between the input voltagethat just causes the output code to transition to the firstcode and the negative reference voltage. Bottom Offset isdefined as EOB = VZT–VRB, where VZT is the first code transitioninput voltage and VRB is the lower reference voltage.Note that this is different from the normal Zero Scale Error.CONVERSION LATENCY See PIPELINE DELAY.CONVERSION TIME is the time required for a completemeasurement by an analog-to-digital converter. Since theConversion Time does not include acquisition time, multiplexerset up time, or other elements of a complete conversioncycle, the conversion time may be less than theThroughput Time.DC COMMON-MODE ERROR is a specification which appliesto ADCs with differential inputs. It is the change in theoutput code that occurs when the analog voltages on the twoinputs are changed by an equal amount. It is usually expressed in LSBs.
上傳時間： 2013-11-12
上傳用戶：pans0ul
One of the strengths of Synplify is the Finite State Machine compiler. This is a powerfulfeature that not only has the ability to automatically detect state machines in the sourcecode, and implement them with either sequential, gray, or one-hot encoding. But alsoperform a reachability analysis to determine all the states that could possibly bereached, and optimize away all states and transition logic that can not be reached.Thus, producing a highly optimal final implementation of the state machine.
標簽： Synplicity Machine Verilog Design
上傳時間： 2013-10-23
上傳用戶：司令部正軍級
數字與模擬電路設計技巧IC與LSI的功能大幅提升使得高壓電路與電力電路除外，幾乎所有的電路都是由半導體組件所構成，雖然半導體組件高速、高頻化時會有EMI的困擾，不過為了充分發揮半導體組件應有的性能，電路板設計與封裝技術仍具有決定性的影響。 模擬與數字技術的融合由于IC與LSI半導體本身的高速化，同時為了使機器達到正常動作的目的，因此技術上的跨越競爭越來越激烈。雖然構成系統的電路未必有clock設計，但是毫無疑問的是系統的可靠度是建立在電子組件的選用、封裝技術、電路設計與成本，以及如何防止噪訊的產生與噪訊外漏等綜合考慮。機器小型化、高速化、多功能化使得低頻/高頻、大功率信號/小功率信號、高輸出阻抗/低輸出阻抗、大電流/小電流、模擬/數字電路，經常出現在同一個高封裝密度電路板，設計者身處如此的環境必需面對前所未有的設計思維挑戰，例如高穩定性電路與吵雜(noisy)性電路為鄰時，如果未將噪訊入侵高穩定性電路的對策視為設計重點，事后反復的設計變更往往成為無解的夢魘。模擬電路與高速數字電路混合設計也是如此，假設微小模擬信號增幅后再將full scale 5V的模擬信號，利用10bit A/D轉換器轉換成數字信號，由于分割幅寬祇有4.9mV，因此要正確讀取該電壓level并非易事，結果造成10bit以上的A/D轉換器面臨無法順利運作的窘境。另一典型實例是使用示波器量測某數字電路基板兩點相隔10cm的ground電位，理論上ground電位應該是零，然而實際上卻可觀測到4.9mV數倍甚至數十倍的脈沖噪訊(pulse noise)，如果該電位差是由模擬與數字混合電路的grand所造成的話，要測得4.9 mV的信號根本是不可能的事情，也就是說為了使模擬與數字混合電路順利動作，必需在封裝與電路設計有相對的對策，尤其是數字電路switching時，ground vance noise不會入侵analogue ground的防護對策，同時還需充分檢討各電路產生的電流回路(route)與電流大小，依此結果排除各種可能的干擾因素。以上介紹的實例都是設計模擬與數字混合電路時經常遇到的瓶頸，如果是設計12bit以上A/D轉換器時，它的困難度會更加復雜。
上傳時間： 2013-11-16
上傳用戶：731140412
目錄： 1. Character Type Functions － 字符類型函數 2. Standard C Input/Output Functions － 標準輸入輸出函數 3. Standard Library Functions － 標準庫和內存分配函數 4. Mathematical Functions － 數學函數 5. String Functions － 字符串函數 6. BCD Conversion Functions － BCD 轉換函數 7. Memory Access Functions － 存儲器訪問函數 8. Delay Functions － 延時函數 9. LCD Functions － LCD函數 10. LCD Functions for displays with 4x40 characters － 4×40 字符型LCD函數 11. LCD Functions for displays connected in 8 bit memory mapped mode －以8 位外部存儲 器模式接口的LCD顯示函數 12. I2C Bus Functions － I2C 總線函數 13. National Semiconductor LM75 Temperature Sensor Functions － LM75 溫度傳感器函數 14. Dallas Semiconductor DS1621 Thermometer/Thermostat Functions － DS1621 溫度計函 數 15. Philips PCF8563 Real Time Clock Functions － PCF8563 實時時鐘函數 16. Philips PCF8583 Real Time Clock Functions － PCF8583 實時時鐘函數 17. Dallas Semiconductor DS1302 Real Time Clock Functions － DS1302 實時時鐘函數 18. Dallas Semiconductor DS1307 Real Time Clock Functions － DS1307 實時時鐘函數 19. 1 Wire Protocol Functions － 單線通訊協議函數 20. Dallas Semiconductor DS1820/DS1822 Temperature Sensors Functions － DS1820/1822 溫度傳感器函數 21. SPI Functions － SPI 函數 22. Power Management Functions － 電源管理函數 23. Gray Code Conversion Functions － 格雷碼轉換函數
上傳時間： 2013-10-22
上傳用戶：歸海惜雪
為深入了解基于UC3854A控制的PFC變換器中的動力學特性，研究系統參數變化對變換器中分岔現象的影響，在建立Boost PFC變換器雙閉環數學模型的基礎上，用Matlab軟件對變換器中慢時標分岔及混沌等不穩定現象進行了仿真。在對PFC變換器中慢時標分岔現象仿真的基礎上，分析了系統參數變化對分岔點的影響，并進行了仿真驗證。仿真結果清晰地顯示了輸入整流電壓的幅值變化對系統分岔點的影響。 Abstract: In order to better understand the dynamics characteristic of power factor correction converter based on UC3854A， and make the way that parameters change influences the bifurcation phenomena of the system clearly. The math model of the two closed loop circuits to the Boost PFC （Power Factor Correction） converter controller was built. Then， with the help of Matlab， the simulation for nonlinear phenomena such as chaos and slow-scale bifurcation in the PFC converter was made. Finally the factors that have influence to the phenomenon of bifurcation under slow-scale in PFC converter were analyzed. The simulation results clearly show the parameters change influences the bifurcation point of the system.
上傳時間： 2013-10-17
上傳用戶：杜瑩12345
Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.
上傳時間： 2013-10-22
上傳用戶：ztj182002
