Analog signals are represented by 64 bit buses. They are converted to real and from real representation using PLI functions
標簽: real represented representa are
上傳時間: 2016-05-07
上傳用戶:gonuiln
buses are a powerful and efficient modeling construct. Using them to produce optimal code is dependent on following a basic set of best practices. This document provides a set of patterns that can be followed the best results
標簽: efficient construct powerful modeling
上傳時間: 2013-12-15
上傳用戶:cc1015285075
some applications about pci buses
標簽: applications about buses some
上傳時間: 2013-12-17
上傳用戶:daoxiang126
Very useful document about PCI-X buses
標簽: document useful PCI-X about
上傳時間: 2013-11-29
上傳用戶:tfyt
Useful techinical document about PCI buses
標簽: techinical document Useful about
上傳時間: 2017-08-20
上傳用戶:731140412
附件有二個文當,都是dxp2004教程 ,第一部份DXP2004的相關(guān)快捷鍵,以及中英文對照的意思。第二部份細致的講解的如何使用DXP2004。 dxp2004教程第一部份: 目錄 1 快捷鍵 2 常用元件及封裝 7 創(chuàng)建自己的集成庫 12 板層介紹 14 過孔 15 生成BOM清單 16 頂層原理圖: 16 生成PCB 17 包地 18 電路板設(shè)計規(guī)則 18 PCB設(shè)計注意事項 20 畫板心得 22 DRC 規(guī)則英文對照 22 一、Error Reporting 中英文對照 22 A : Violations Associated with buses 有關(guān)總線電氣錯誤的各類型(共 12 項) 22 B :Violations Associated Components 有關(guān)元件符號電氣錯誤(共 20 項) 22 C : violations associated with document 相關(guān)的文檔電氣錯誤(共 10 項) 23 D : violations associated with nets 有關(guān)網(wǎng)絡(luò)電氣錯誤(共 19 項) 23 E : Violations associated with others 有關(guān)原理圖的各種類型的錯誤 (3 項 ) 24 二、 Comparator 規(guī)則比較 24 A : Differences associated with components 原理圖和 PCB 上有關(guān)的不同 ( 共 16 項 ) 24 B : Differences associated with nets 原理圖和 PCB 上有關(guān)網(wǎng)絡(luò)不同(共 6 項) 25 C : Differences associated with parameters 原理圖和 PCB 上有關(guān)的參數(shù)不同(共 3 項) 25 Violations Associated withbuses欄 —總線電氣錯誤類型 25 Violations Associated with Components欄 ——元件電氣錯誤類型 26 Violations Associated with documents欄 —文檔電氣連接錯誤類型 27 Violations Associated with Nets欄 ——網(wǎng)絡(luò)電氣連接錯誤類型 27 Violations Associated with Parameters欄 ——參數(shù)錯誤類型 28 dxp2004教程第二部份 路設(shè)計自動化( Electronic Design Automation ) EDA 指的就是將電路設(shè)計中各種工作交由計算機來協(xié)助完成。如電路圖( Schematic )的繪制,印刷電路板( PCB )文件的制作執(zhí)行電路仿真( Simulation )等設(shè)計工作。隨著電子工業(yè)的發(fā)展,大規(guī)模、超大規(guī)模集成電路的使用是電路板走線愈加精密和復雜。電子線路 CAD 軟件產(chǎn)生了, Protel 是突出的代表,它操作簡單、易學易用、功能強大。 1.1 Protel 的產(chǎn)生及發(fā)展 1985 年 誕生 dos 版 Protel 1991 年 Protel for Widows 1998 年 Protel98 這個 32 位產(chǎn)品是第一個包含 5 個核心模塊的 EDA 工具 1999 年 Protel99 既有原理圖的邏輯功能驗證的混合信號仿真,又有了 PCB 信號完整性 分析的板級仿真,構(gòu)成從電路設(shè)計到真實板分析的完整體系。 2000 年 Protel99se 性能進一步提高,可以對設(shè)計過程有更大控制力。 2002 年 Protel DXP 集成了更多工具,使用方便,功能更強大。 1.2 Protel DXP 主要特點 1 、通過設(shè)計檔包的方式,將原理圖編輯、電路仿真、 PCB 設(shè)計及打印這些功能有機地結(jié)合在一起,提供了一個集成開發(fā)環(huán)境。 2 、提供了混合電路仿真功能,為設(shè)計實驗原理圖電路中某些功能模塊的正確與否提供了方便。 3 、提供了豐富的原理圖組件庫和 PCB 封裝庫,并且為設(shè)計新的器件提供了封裝向?qū)С绦颍喕朔庋b設(shè)計過程。 4 、提供了層次原理圖設(shè)計方法,支持“自上向下”的設(shè)計思想,使大型電路設(shè)計的工作組開發(fā)方式成為可能。 5 、提供了強大的查錯功能。原理圖中的 ERC (電氣法則檢查)工具和 PCB 的 DRC (設(shè)計規(guī)則檢查)工具能幫助設(shè)計者更快地查出和改正錯誤。 6 、全面兼容 Protel 系列以前版本的設(shè)計文件,并提供了 OrCAD 格式文件的轉(zhuǎn)換功能。 7 、提供了全新的 FPGA 設(shè)計的功能,這好似以前的版本所沒有提供的功能。
上傳時間: 2013-10-22
上傳用戶:qingzhuhu
目錄 目錄 1 快捷鍵 2 常用元件及封裝 7 創(chuàng)建自己的集成庫 12 板層介紹 14 過孔 15 生成BOM清單 16 頂層原理圖: 16 生成PCB 17 包地 18 電路板設(shè)計規(guī)則 18 PCB設(shè)計注意事項 20 畫板心得 22 DRC 規(guī)則英文對照 22 一、Error Reporting 中英文對照 22 A : Violations Associated with buses 有關(guān)總線電氣錯誤的各類型(共 12 項) 22 B :Violations Associated Components 有關(guān)元件符號電氣錯誤(共 20 項) 22 C : violations associated with document 相關(guān)的文檔電氣錯誤(共 10 項) 23 D : violations associated with nets 有關(guān)網(wǎng)絡(luò)電氣錯誤(共 19 項) 23 E : Violations associated with others 有關(guān)原理圖的各種類型的錯誤 (3 項 ) 24 二、 Comparator 規(guī)則比較 24 A : Differences associated with components 原理圖和 PCB 上有關(guān)的不同 ( 共 16 項 ) 24 B : Differences associated with nets 原理圖和 PCB 上有關(guān)網(wǎng)絡(luò)不同(共 6 項) 25 C : Differences associated with parameters 原理圖和 PCB 上有關(guān)的參數(shù)不同(共 3 項) 25 Violations Associated withbuses欄 —總線電氣錯誤類型 25 Violations Associated with Components欄 ——元件電氣錯誤類型 26 Violations Associated with documents欄 —文檔電氣連接錯誤類型 27 Violations Associated with Nets欄 ——網(wǎng)絡(luò)電氣連接錯誤類型 27 Violations Associated with Parameters欄 ——參數(shù)錯誤類型 28
上傳時間: 2014-03-26
上傳用戶:kytqcool
Demonstration circuit 1562A is an engineering toolto design and evaluate the LTC699X-X family ofTimerBlox circuits. The center section of the boardcontains a pre-configured TimerBlox function.DC1562A comes in twelve timing function variationsas outlined in Table 1.Surrounding the center board is a ”playground”prototyping area. The prototyping area has padsfor Dip-8, S8, MS8, or S6 packages with breadboarding connections to each pin and two convenientpower buses and ground bus surrounding theentire area. This area is for conditioning signals tocontrol the timer function and for adding loads controlled in time.
上傳時間: 2013-10-18
上傳用戶:如果你也聽說
The SN65LBC170 and SN75LBC170 aremonolithic integrated circuits designed forbidirectional data communication on multipointbus-transmission lines. Potential applicationsinclude serial or parallel data transmission, cabledperipheral buses with twin axial, ribbon, ortwisted-pair cabling. These devices are suitablefor FAST-20 SCSI and can transmit or receivedata pulses as short as 25 ns, with skew lessthan 3 ns.These devices combine three 3-state differentialline drivers and three differential input linereceivers, all of which operate from a single 5-Vpower supply.The driver differential outputs and the receiverdifferential inputs are connected internally to formthree differential input/output (I/O) bus ports thatare designed to offer minimum loading to the buswhenever the driver is disabled or VCC = 0. Theseports feature a wide common-mode voltage rangemaking the device suitable for party-lineapplications over long cable runs.
上傳時間: 2013-10-13
上傳用戶:ytulpx
The PCA9516 is a BiCMOS integrated circuit intended forapplication in I2C and SMBus systems.While retaining all the operating modes and features of the I2Csystem, it permits extension of the I2C-bus by buffering both the data(SDA) and the clock (SCL) lines, thus enabling five buses of 400 pF.The I2C-bus capacitance limit of 400 pF restricts the number ofdevices and bus length. Using the PCA9516 enables the systemdesigner to divide the bus into five segments off of a hub where anysegment to segment transition sees only one repeater delay.
上傳時間: 2013-11-21
上傳用戶:q123321
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