SL811開發資料_包含源程序_電路圖_芯片資料:SL811HS Embedded USB Host/Slave Controller.The SL811HS is an Embedded USB Host/Slave Controller capable of communicate with either full-speed or low-speed USB peripherals. The SL811HS can interface to devices such as microprocessors, microcontrollers, DSPs, or directly to a variety of buses such as ISA, PCMCIA, and others. The SL811HS USB Host Controller conforms to USB Specification 1.1.The SL811HS USB Host/Slave Controller incorporates USB Serial Interface functionality along with internal full-/low-speed transceivers.The SL811HS supports and operates in USB full-speed mode at 12 Mbps, or at low-speed 1.5-Mbps mode.The SL811HS data port and microprocessor interface provide an 8-bit data path I/O or DMA bidirectional, with interrupt support to allow easy interface to standard microprocessors or microcontrollers such as Motorola or Intel CPUs and many others. Internally,the SL811HS contains a 256-byte RAM data buffer which is used for control registers and data buffer.The available package types offered are a 28-pin PLCC (SL811HS) and a 48-pin TQFP package (SL811HST-AC). Both packages operate at 3.3 VDC. The I/O interface logic is 5V-tolerant.
上傳時間： 2013-12-22
上傳用戶：a82531317
This application note describes a method for developing block-oriented I/O device drivers for applications that use the DSP/BIOS real-time kernel and includes examples that run with Code Composer Studio v2.1 on the Texas Instruments TMS320C5402 and TMS320C6711 DSP Starter Kits (DSKs). The device driver model presented here has now been superceded with an updated version that supports not only block oriented devices, but also devices such as UARTs, PCI and USB buses and Multimedia cards. Documentation on the updated driver model as well as example drivers and source code can be found in the Device Driver Developer s Kit product now available for download from the TI Developer s Village.
標簽： block-oriented application developing describes
上傳時間： 2015-07-07
上傳用戶：kelimu
libraw1394 is the only supported interface to the kernel side raw1394 of the Linux IEEE-1394 subsystem, which provides direct access to the connected 1394 buses to user space. Through libraw1394/raw1394, applications can directly send to and receive from other nodes without requiring a kernel driver for the protocol in question.
標簽： 1394 the interface supported
上傳時間： 2015-08-07
上傳用戶：徐孺
PCI Hot-Plug Specification Revision 1.0 The primary objective of this specification is to enable higher availability of file and application servers by standardizing key aspects of the process of removing and installing PCI adapter cards while the system is running. Although these same principles can be applied to desktop and portable systems using PCI buses, the operations described here target server platforms.
標簽： Specification specification objective Hot-Plug
上傳時間： 2013-12-09
上傳用戶：zyt
The TMS320C54x, TMS320LC54x, and TMS320VC54x fixed-point, digital signal processor (DSP) families (hereafter referred to as the ’54x unless otherwise specified) are based on an advanced modified Harvard architecture that has one program memory bus and three data memory buses. These processors also provide an arithmetic logic unit (ALU) that has a high degree of parallelism, application-specific hardware logic, on-chip memory, and additional on-chip peripherals. These DSP families also provide a highly specialized instruction set, which is the basis of the operational flexibility and speed of these DSPs.
標簽： TMS 320 fixed-point processor
上傳時間： 2013-12-27
上傳用戶：宋桃子
The ADC0803 family is a series of three CMOS 8-bit successive approximation A/D converters using a resistive ladder and capacitive array together with an auto-zero comparator. These converters are designed to operate with microprocessor-controlled buses using a minimum of external circuitry. The 3-State output data lines can be connected directly to the data bus.
標簽： approximation converters successive family
上傳時間： 2016-11-20
上傳用戶：libenshu01
The Definitive Guide to SOA: Oracle® Service Bus, Second Edition targets professional software developers and architects who know enterprise development but are new to enterprise service buses (ESBs) and service–oriented architecture (SOA) development. This is the first book to cover a practical approach to SOA using the BEA AquaLogic Service Bus tool. And it’s written from the “source”—BEA Systems AquaLogic product lead Jeff Davies.
標簽： professional Definitive software Edition
上傳時間： 2014-01-22
上傳用戶：wpwpwlxwlx
Supplemental information for a high-speed serial bus that integrates well with most IEEE standard 32-bit and 64-bit parallel buses is specified. It is intended to extend the usefulness of a low-cost interconnect between external peripherals, IEEE Std 1394-1995. This standard follows the ISO/IEC 13213:1994 Command and Status Register (CSR) architecture.
標簽： Supplemental information high-speed integrates
上傳時間： 2014-03-07
上傳用戶：jjj0202
The NCA9511 is a hot-swappable I2C bus buffer that supports I/O card insertion into a live backplane without corruption of the data and clock buses.
上傳時間： 2021-01-26
上傳用戶：
The GD32F103xx device is a 32-bit general-purpose microcontroller based on the ARM?Cortex?-M3 RISC core with best ratio in terms of processing power, reduced power consumption and peripheral set. The Cortex?-M3 is a next generation processor core whichis tightly coupled with a Nested Vectored Interrupt Controller (NVIC), SysTick timer and advanced debug support.The GD32F103xx device incorporates the ARM ' Cortex?-M3 32-bit processor core operating at 108 MHz frequency with Flash accesses zero wait states to obtain maximumefficiency. It provides up to 3 MB on-chip Flash memory and up to 96 KB SRAM memory. An extensive range of enhanced I/Os and peripherals connected to two APB buses. The devices offer up to three 12-bit ADCs, up to two 12-bit DACs, up to ten general-purpose
標簽： gd32f103
上傳時間： 2022-07-23
上傳用戶：aben
