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  • 數(shù)字衛(wèi)星設(shè)備控制兼容的天線供電系統(tǒng)設(shè)計(jì)

    Abstract: This application note discusses a design for a phantom antenna power-supply system compatible with theDigital Satellite Equipment Control (DiSEqC) communication standard, using the MAX16948 automotive dual, highvoltageLDO/switch. The presented application circuit provides a remote antenna power supply and also enables onewaycommunication from the radio head unit to the remote antenna. This system architecture offers flexibility inDiSEqC tone-burst frequency choice (100Hz to 30kHz), enabling users the ability to select the best frequency for theirapplication.

    標(biāo)簽: 數(shù)字衛(wèi)星 控制 兼容 供電系統(tǒng)設(shè)計(jì)

    上傳時(shí)間: 2013-11-17

    上傳用戶:fnhhs

  • 射頻和微波系統(tǒng)的建模與仿真

    Abstract: This application note describes system-level characterization and modeling techniques for radio frequency (RF) and microwavesubsystem components. It illustrates their use in a mixed-signal, mixed-mode system-level simulation. The simulation uses an RF transmitterwith digital predistortion (DPD) as an example system. Details of this complex system and performance data are presented.

    標(biāo)簽: 射頻 仿真 微波系統(tǒng) 建模

    上傳時(shí)間: 2013-12-18

    上傳用戶:onewq

  • MAX16948雙遙控天線LDO開關(guān)

      Abstract: This application note helps system designers choose the correct external components for use with the MAX16948 dualremote antenna LDO/switch, thus ensuring that automobile-regulated phantom antenna supply and output-current-monitoring circuitrymeet performance objectives. An electronic calculator is provided that helps specify the critical external components for theMAX16948, thus reducing design time. The calculator also determines the device's analog output voltage, output current-limitthreshold, and output current-sensing accuracies. The calculator includes new automatic Step By Step feature that assists designerswith component choice. To use the new automatic feature, click on the Step By Step button relative to the desired section.

    標(biāo)簽: 16948 MAX LDO 遙控天線

    上傳時(shí)間: 2013-11-04

    上傳用戶:lhll918

  • ZigBee無(wú)線傳感網(wǎng)絡(luò)的路由協(xié)議研究

     為滿足無(wú)線網(wǎng)絡(luò)技術(shù)具有低功耗、節(jié)點(diǎn)體積小、網(wǎng)絡(luò)容量大、網(wǎng)絡(luò)傳輸可靠等技術(shù)要求,設(shè)計(jì)了一種以MSP430單片機(jī)和CC2420射頻收發(fā)器組成的無(wú)線傳感節(jié)點(diǎn)。通過(guò)分析其節(jié)點(diǎn)組成,提出了ZigBee技術(shù)中的幾種網(wǎng)絡(luò)拓?fù)湫问剑⒀芯苛薢igBee路由算法。針對(duì)不同的傳輸要求形式選用不同的網(wǎng)絡(luò)拓?fù)湫问娇梢员M大可能地減少系統(tǒng)成本。同時(shí)針對(duì)不同網(wǎng)絡(luò)選用正確的ZigBee路由算法有效地減少了網(wǎng)絡(luò)能量消耗,提高了系統(tǒng)的可靠性。應(yīng)用試驗(yàn)表明,采用ZigBee方式通信可以提高傳輸速率且覆蓋范圍大,與傳統(tǒng)的有線通信方式相比可以節(jié)約40%左右的成本。 Abstract:  To improve the proposed technical requirements such as low-ower, small nodes, large capacity and reliable network transmission, wireless sensor nodes based on MSP430 MCU and CC2420 RF transceiver were designed. This paper provided network topology of ZigBee technology by analysing the component of the nodes and researched ZigBee routing algorithm. Aiming at different requirements of transmission mode to choose the different network topologies form can most likely reduce the system cost. And aiming at different network to choose the correct ZigBee routing algorithm can effectively reduced the network energy consumption and improved the reliability of the system. Results show that the communication which used ZigBee mode can improve the transmission rate, cover more area and reduce 40% cost compared with traditional wired communications mode.

    標(biāo)簽: ZigBee 無(wú)線傳感網(wǎng)絡(luò) 協(xié)議研究 路由

    上傳時(shí)間: 2013-10-09

    上傳用戶:robter

  • HH千兆多光多電外置電源光纖收發(fā)器

    產(chǎn)品說(shuō)明: 是 1000M自適應(yīng)以太網(wǎng)外置電源光纖收發(fā)器,可以將 10/100BASE-TX的雙絞線電信號(hào)和1000BASE-LX的光信號(hào)相互轉(zhuǎn)換。它將網(wǎng)絡(luò)的傳輸距離的極限從銅線的100 米擴(kuò)展到224/550m(多模光纖)、100公里(單模光纖)。可簡(jiǎn)便地實(shí)現(xiàn) HUB、SWITCH、服務(wù)器、終端機(jī)與遠(yuǎn)距離終端機(jī)之間的互連。HH-GE-200 系列以太網(wǎng)光纖收發(fā)器即插即用,即可單機(jī)使用,也可多機(jī)集成于同一機(jī)箱內(nèi)使用。

    標(biāo)簽: 光纖收發(fā)器 外置電源

    上傳時(shí)間: 2013-12-22

    上傳用戶:哈哈haha

  • 差分電路中單端及混合模式S-參數(shù)的使用

    Single-Ended and Differential S-Parameters Differential circuits have been important incommunication systems for many years. In the past,differential communication circuits operated at lowfrequencies, where they could be designed andanalyzed using lumped-element models andtechniques. With the frequency of operationincreasing beyond 1GHz, and above 1Gbps fordigital communications, this lumped-elementapproach is no longer valid, because the physicalsize of the circuit approaches the size of awavelength.Distributed models and analysis techniques are nowused instead of lumped-element techniques.Scattering parameters, or S-parameters, have beendeveloped for this purpose [1]. These S-parametersare defined for single-ended networks. S-parameterscan be used to describe differential networks, but astrict definition was not developed until Bockelmanand others addressed this issue [2]. Bockelman’swork also included a study on how to adapt single-ended S-parameters for use with differential circuits[2]. This adaptation, called “mixed-mode S-parameters,” addresses differential and common-mode operation, as well as the conversion betweenthe two modes of operation.This application note will explain the use of single-ended and mixed-mode S-parameters, and the basicconcepts of microwave measurement calibration.

    標(biāo)簽: 差分電路 單端 模式

    上傳時(shí)間: 2014-03-25

    上傳用戶:yyyyyyyyyy

  • LTC3207,LTC3207-1用戶指南

      The LTC®3207/LTC3207-1 is a 600mA LED/Camera driverwhich illuminates 12 Universal LEDs (ULEDs) and onecamera fl ash LED. The ULEDs are considered universalbecause they may be individually turned on or off, setin general purpose output (GPO) mode, set to blink at aselected on-time and period, or gradate on and off at aselected gradation rate. This device also has an externalenable (ENU) pin that may be used to blink, gradate, orturn on/off the LEDs without using the I2C bus. This may beuseful if the microprocessor is in sleep or standby mode. Ifused properly, these features may save valuable memoryspace, programming time, and reduce the I2C traffi c.

    標(biāo)簽: 3207 LTC 用戶

    上傳時(shí)間: 2014-01-04

    上傳用戶:LANCE

  • Proteus教程中涉及的基本概念

      基本的編輯工具(GENERAL EDITING FACILITIES)   對(duì)象放置(Object Placement)   ISIS支持多種類型的對(duì)象,每一類型對(duì)象的具體作用和功能將在下一章給出。雖然類型不同,但放置對(duì)象的基本步驟都是一樣的。   放置對(duì)象的步驟如下(To place an object:)   1.根據(jù)對(duì)象的類別在工具箱選擇相應(yīng)模式的圖標(biāo)(mode icon)。   2. Select the sub-mode icon for the specific type of object.   2、根據(jù)對(duì)象的具體類型選擇子模式圖標(biāo)(sub-mode icon)。   3、如果對(duì)象類型是元件、端點(diǎn)、管腳、圖形、符號(hào)或標(biāo)記,從選擇器里(selector)選擇你想要的對(duì)象的名字。對(duì)于元件、端點(diǎn)、管腳和符號(hào),可能首先需要從庫(kù)中調(diào)出。   4、如果對(duì)象是有方向的,將會(huì)在預(yù)覽窗口顯示出來(lái),你可以通過(guò)點(diǎn)擊旋轉(zhuǎn)和鏡象圖標(biāo)來(lái)調(diào)整對(duì)象的朝向。   5、最后,指向編輯窗口并點(diǎn)擊鼠標(biāo)左鍵放置對(duì)象。對(duì)于不同的對(duì)象,確切的步驟可能略有不同,但你會(huì)發(fā)現(xiàn)和其它的圖形編輯軟件是類似的,而且很直觀。   選中對(duì)象(Tagging an Object)   用鼠標(biāo)指向?qū)ο蟛Ⅻc(diǎn)擊右鍵可以選中該對(duì)象。該操作選中對(duì)象并使其高亮顯示,然后可以進(jìn)行編輯。

    標(biāo)簽: Proteus 教程 基本概念

    上傳時(shí)間: 2013-10-29

    上傳用戶:avensy

  • Xilinx FPGA集成電路的動(dòng)態(tài)老化試驗(yàn)

      3 FPGA設(shè)計(jì)流程   完整的FPGA 設(shè)計(jì)流程包括邏輯電路設(shè)計(jì)輸入、功能仿真、綜合及時(shí)序分析、實(shí)現(xiàn)、加載配置、調(diào)試。FPGA 配置就是將特定的應(yīng)用程序設(shè)計(jì)按FPGA設(shè)計(jì)流程轉(zhuǎn)化為數(shù)據(jù)位流加載到FPGA 的內(nèi)部存儲(chǔ)器中,實(shí)現(xiàn)特定邏輯功能的過(guò)程。由于FPGA 電路的內(nèi)部存儲(chǔ)器都是基于RAM 工藝的,所以當(dāng)FPGA電路電源掉電后,內(nèi)部存儲(chǔ)器中已加載的位流數(shù)據(jù)將隨之丟失。所以,通常將設(shè)計(jì)完成的FPGA 位流數(shù)據(jù)存于外部存儲(chǔ)器中,每次上電自動(dòng)進(jìn)行FPGA電路配置加載。   4 FPGA配置原理    以Xilinx公司的Qpro Virtex Hi-Rel系列XQV100電路為例,F(xiàn)PGA的配置模式有四種方案可選擇:MasterSerial Mode,Slave Serial Mode,Master selectMAPMode,Slave selectMAP Mode。配置是通過(guò)芯片上的一組專/ 復(fù)用引腳信號(hào)完成的,主要配置功能信號(hào)如下:   (1)M0、M1、M2:下載配置模式選擇;   (2)CLK:配置時(shí)鐘信號(hào);   (3)DONE:顯示配置狀態(tài)、控制器件啟動(dòng);

    標(biāo)簽: Xilinx FPGA 集成電路 動(dòng)態(tài)老化

    上傳時(shí)間: 2013-11-18

    上傳用戶:oojj

  • Verilog_HDL的基本語(yǔ)法詳解(夏宇聞版)

            Verilog_HDL的基本語(yǔ)法詳解(夏宇聞版):Verilog HDL是一種用于數(shù)字邏輯電路設(shè)計(jì)的語(yǔ)言。用Verilog HDL描述的電路設(shè)計(jì)就是該電路的Verilog HDL模型。Verilog HDL既是一種行為描述的語(yǔ)言也是一種結(jié)構(gòu)描述的語(yǔ)言。這也就是說(shuō),既可以用電路的功能描述也可以用元器件和它們之間的連接來(lái)建立所設(shè)計(jì)電路的Verilog HDL模型。Verilog模型可以是實(shí)際電路的不同級(jí)別的抽象。這些抽象的級(jí)別和它們對(duì)應(yīng)的模型類型共有以下五種:   系統(tǒng)級(jí)(system):用高級(jí)語(yǔ)言結(jié)構(gòu)實(shí)現(xiàn)設(shè)計(jì)模塊的外部性能的模型。   算法級(jí)(algorithm):用高級(jí)語(yǔ)言結(jié)構(gòu)實(shí)現(xiàn)設(shè)計(jì)算法的模型。   RTL級(jí)(Register Transfer Level):描述數(shù)據(jù)在寄存器之間流動(dòng)和如何處理這些數(shù)據(jù)的模型。   門級(jí)(gate-level):描述邏輯門以及邏輯門之間的連接的模型。   開關(guān)級(jí)(switch-level):描述器件中三極管和儲(chǔ)存節(jié)點(diǎn)以及它們之間連接的模型。   一個(gè)復(fù)雜電路系統(tǒng)的完整Verilog HDL模型是由若干個(gè)Verilog HDL模塊構(gòu)成的,每一個(gè)模塊又可以由若干個(gè)子模塊構(gòu)成。其中有些模塊需要綜合成具體電路,而有些模塊只是與用戶所設(shè)計(jì)的模塊交互的現(xiàn)存電路或激勵(lì)信號(hào)源。利用Verilog HDL語(yǔ)言結(jié)構(gòu)所提供的這種功能就可以構(gòu)造一個(gè)模塊間的清晰層次結(jié)構(gòu)來(lái)描述極其復(fù)雜的大型設(shè)計(jì),并對(duì)所作設(shè)計(jì)的邏輯電路進(jìn)行嚴(yán)格的驗(yàn)證。   Verilog HDL行為描述語(yǔ)言作為一種結(jié)構(gòu)化和過(guò)程性的語(yǔ)言,其語(yǔ)法結(jié)構(gòu)非常適合于算法級(jí)和RTL級(jí)的模型設(shè)計(jì)。這種行為描述語(yǔ)言具有以下功能:   · 可描述順序執(zhí)行或并行執(zhí)行的程序結(jié)構(gòu)。   · 用延遲表達(dá)式或事件表達(dá)式來(lái)明確地控制過(guò)程的啟動(dòng)時(shí)間。   · 通過(guò)命名的事件來(lái)觸發(fā)其它過(guò)程里的激活行為或停止行為。   · 提供了條件、if-else、case、循環(huán)程序結(jié)構(gòu)。   · 提供了可帶參數(shù)且非零延續(xù)時(shí)間的任務(wù)(task)程序結(jié)構(gòu)。   · 提供了可定義新的操作符的函數(shù)結(jié)構(gòu)(function)。   · 提供了用于建立表達(dá)式的算術(shù)運(yùn)算符、邏輯運(yùn)算符、位運(yùn)算符。   · Verilog HDL語(yǔ)言作為一種結(jié)構(gòu)化的語(yǔ)言也非常適合于門級(jí)和開關(guān)級(jí)的模型設(shè)計(jì)。因其結(jié)構(gòu)化的特點(diǎn)又使它具有以下功能:   - 提供了完整的一套組合型原語(yǔ)(primitive);   - 提供了雙向通路和電阻器件的原語(yǔ);   - 可建立MOS器件的電荷分享和電荷衰減動(dòng)態(tài)模型。   Verilog HDL的構(gòu)造性語(yǔ)句可以精確地建立信號(hào)的模型。這是因?yàn)樵赩erilog HDL中,提供了延遲和輸出強(qiáng)度的原語(yǔ)來(lái)建立精確程度很高的信號(hào)模型。信號(hào)值可以有不同的的強(qiáng)度,可以通過(guò)設(shè)定寬范圍的模糊值來(lái)降低不確定條件的影響。   Verilog HDL作為一種高級(jí)的硬件描述編程語(yǔ)言,有著類似C語(yǔ)言的風(fēng)格。其中有許多語(yǔ)句如:if語(yǔ)句、case語(yǔ)句等和C語(yǔ)言中的對(duì)應(yīng)語(yǔ)句十分相似。如果讀者已經(jīng)掌握C語(yǔ)言編程的基礎(chǔ),那么學(xué)習(xí)Verilog HDL并不困難,我們只要對(duì)Verilog HDL某些語(yǔ)句的特殊方面著重理解,并加強(qiáng)上機(jī)練習(xí)就能很好地掌握它,利用它的強(qiáng)大功能來(lái)設(shè)計(jì)復(fù)雜的數(shù)字邏輯電路。下面我們將對(duì)Verilog HDL中的基本語(yǔ)法逐一加以介紹。

    標(biāo)簽: Verilog_HDL

    上傳時(shí)間: 2014-12-04

    上傳用戶:cppersonal

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