The emphasis of this book is on real-time application of Synopsys tools, used to combat various problems seen at VDSM geometries. Readers will be exposed to an effective design methodology for handling complex, submicron ASIC designs. Significance is placed on HDL coding styles, synthesis and optimization, dynamic simulation, formal verification, DFT scan insertion, links to layout, physical synthesis, and static timing analysis. At each step, problems related to each phase of the design flow are identified, with solutions and work-around described in detail. In addition, crucial issues related to layout, which includes clock tree synthesis and back-end integration (links to layout) are also discussed at length. Furthermore, the book contains in-depth discussions on the basics of Synopsys technology libraries and HDL coding styles, targeted towards optimal synthesis solution.
標(biāo)簽： application real-time Synopsys emphasis
上傳時(shí)間： 2017-07-05
上傳用戶：waitingfy
JXMLEditor is a XML editor developed in Java which is based on the Xerces Java parser. The goal of this editor is to offer some features (tree view, drag & drop, syntax colorizing) to create XML documents easily. Also available as Eclipse Plugin.
標(biāo)簽： Java JXMLEditor developed editor
上傳時(shí)間： 2013-11-30
上傳用戶：水口鴻勝電器
RS_latch using vhdl, When using static gates as building blocks, the most fundamental latch is the simple SR latch, where S and R stand for set and reset. It can be constructed from a pair of cross-coupled NOR (Not OR) logic gates. The stored bit is present on the output marked Q. Normally, in storage mode, the S and R inputs are both low, and feedback maintains the Q and Q outputs in a constant state, with Q the complement of Q. If S (Set) is pulsed high while R is held low, then the Q output is forced high, and stays high when S returns to low similarly, if R (Reset) is pulsed high while S is held low, then the Q output is forced low, and stays low when R returns to low.
標(biāo)簽： using fundamental the RS_latch
上傳時(shí)間： 2017-07-30
上傳用戶：努力努力再努力
Abtract - We propose a new family of fi lter banks, named NDFB, that can achieve the directional decomposition of arbitrary N-dimensional (N ≥ 2) signals with a simple and effi cient tree-structured construction.
標(biāo)簽： direction Abtract propose achieve
上傳時(shí)間： 2014-01-15
上傳用戶：鳳臨西北
此文件夾中共包括十二個(gè)小程序 AVL創(chuàng)建平衡二叉樹,通過加入一個(gè)個(gè)的結(jié)點(diǎn)創(chuàng)建,并實(shí)現(xiàn)了平衡二叉樹中的結(jié)點(diǎn)刪除 Boyer_Moore算法的串模式匹配 Horspool算法的串模式匹配 Graph實(shí)現(xiàn)了有向圖的非遞歸廣度優(yōu)先遍歷及非遞歸深度優(yōu)先遍歷 HeapSort利用堆排序?qū)崿F(xiàn)優(yōu)先級(jí)隊(duì)列 Merge實(shí)現(xiàn)二路歸并排序算法 MFK動(dòng)態(tài)規(guī)劃解背包問題 nqueue求解n皇后問題 QuickSort快速排序算法的實(shí)現(xiàn)。 Shell排序算法的實(shí)現(xiàn)。 Tree程序中實(shí)現(xiàn)了先序\中序\后序遍歷二叉樹的非遞歸算法。 tubao用遞歸法解決突包問題
標(biāo)簽： Boyer_Moore Horspool Grap AVL
上傳時(shí)間： 2017-08-08
上傳用戶：佳期如夢(mèng)
13、堆 MinHeap.h test.cpp 14、哈夫曼樹 BinTreeNode.h BinaryTree.h MinHeap.h Huffman.h Test.cpp 15、樹 164 QueueNode.h LinkQueue.h TreeNode.h Tree.h 170 test.cpp 16、B+樹 BTreeNode.h BTree.h 192 test.cpp 17、圖 217 MinHeap.h Edge.h 222 Vertex.h Graph.h 224 test.cpp 18、排序 Data.h 249 QueueNode.h LinkQueue.h Sort.h 263 test.cpp
標(biāo)簽： MinHeap BinTreeNode BinaryTree Huffman
上傳時(shí)間： 2017-08-14
上傳用戶：AbuGe
函數(shù)程序設(shè)計(jì)haskell的作業(yè)，實(shí)現(xiàn)一個(gè)抽象數(shù)據(jù)類型tree模塊
標(biāo)簽： haskell 函數(shù) 程序設(shè)計(jì)
上傳時(shí)間： 2017-08-16
上傳用戶：王小奇
The algorithm ID3 (Quinlan) uses the method top-down induction of decision trees. Given a set of classified examples a decision tree is induced, biased by the information gain measure, which heuristically leads to small trees. The examples are given in attribute-value representation. The set of possible classes is finite. Only tests, that split the set of instances of the underlying example languages depending on the value of a single attribute are supported.
標(biāo)簽： algorithm induction decision top-down
上傳時(shí)間： 2017-08-20
上傳用戶：hzy5825468
在圖形中若于個(gè)邊(edge)上加上一些值，此數(shù)值稱為比重( weight ) 。而此圖形稱為比重圖形(Weight Graph ) ，若weight是成本( cost )或距離( distance ) ，則稱此圖形為網(wǎng)路( Network )。根據(jù)Spanning Tree的定義，知一個(gè)圖形可有許多不同spanning tree ，在network中找出一個(gè)具有最小成本( Cost )的Spanning tree ，則此Spanning tree稱為最小成本生成樹。
上傳時(shí)間： 2013-12-28
上傳用戶：Shaikh
Complete coverage of all four CCNP exams: ? EIGRP, OSPF, IS-IS, and BGP ? Optimizing routing ? IP multicast ? IPv6 ? VLAN implementation ? Spanning Tree ? InterVLAN routing ? Layer 3 redundancy ? Wireless LANs ? VoIP in campus networks ? Campus network security ? Frame-mode MPLS ? IPsec ? Cisco device hardening ? Cisco IOS? threat defenses ? Cisco VoIP ? QoS and AutoQoS ? Wireless scalability
標(biāo)簽： Optimizing Complete coverage routing
上傳時(shí)間： 2017-09-26
上傳用戶：cuibaigao
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