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Silicon-Based

  • C8051F040單片機開發與C語言編程(例子)

    光盤內容1.1例 程 “例程”文件夾中為各章節的程序代碼,均在作者的目標板上(自行開發)調試通過,以確保程序正確。n Keil C對中文文件、目錄以及空格等可能無法編譯連接,所以若要正確調試,須確保所有文件、目錄為連續英文名或數字。n 這些程序應用到其他C8051Fxxx系列單片機時,要確保各個操作寄存器的名稱、地址與各個控制位相一致,否則需要修改。很多寄存器位的位置并不相同,所以移植程序時,使用者要參考F040寄存器和移植對象單片機的寄存器,以確保正確操作。1.2 原理圖及pcb封裝“原理圖及pcb封裝”文件夾里包含作者制作的C8051F040PCB封裝和原理圖引腳定義文件c8051f040.ddb。其中PCB封裝與Silicon Laboratories公司(原Cygnal公司)提供的TQ100封裝稍有不同(在cygnalpcb文件中): 作者所做引腳長為2.5 mm,而cygnalpcb文件中的引腳長為1.3 mm。加長引腳焊盤是為了方便手工焊芯片。用戶可根據需要和習慣選擇封裝。

    標簽: C8051F040 單片機開發 C語言編程

    上傳時間: 2013-11-19

    上傳用戶:

  • pk51下載 (8051單片機開發工具)

    PK51是為8051系列單片機所設計的開發工具,支持所有8051系列衍生產品,,支持帶擴展存儲器和擴展指令集(例如Dallas390/5240/400,Philips 51MX,Analog Devices MicroConverters)的新設備,以及支持很多公司的一流的設備和IP內核,比如Analog Devices, Atmel, Cypress Semiconductor, Dallas Semiconductor, Goal, Hynix, Infineon, Intel, NXP(founded by Philips), OKI, Silicon Labs,SMSC, STMicroeleectronics,Synopsis, TDK, Temic, Texas Instruments,Winbond等。通過PK51專業級開發工具,可以輕松地了解8051的On-chip peripherals與及其它關鍵特性。    

    標簽: 8051 pk 51

    上傳時間: 2013-10-09

    上傳用戶:1109003457

  • 基于DSP Builder數字信號處理器的FPGA設計

    針對使用硬件描述語言進行設計存在的問題,提出一種基于FPGA并采用DSP Builder作為設計工具的數字信號處理器設計方法。并按照Matlab/Simulink/DSP Builder/QuartusⅡ設計流程,設計了一個12階FIR 低通數字濾波器,通過Quartus 時序仿真及嵌入式邏輯分析儀SignalTapⅡ硬件測試對設計進行了驗證。結果表明,所設計的FIR 濾波器功能正確,性能良好。 Abstract:  Aiming at the problems in designing DSP using HDL,a method of designing DSP based on FPGA which using DSP Builder as designed tool is pointed out.A 12-order low-pass FIR digital filter was designed according to the process of Matlab/Simulink/DSP Builder/QuartusⅡ, and the design was verified by the timing simulation based on QuartusⅡand practical test based on SignalTapⅡ. The result shows the designed filter is correct in function and good in performance.

    標簽: Builder FPGA DSP 數字信號處理器

    上傳時間: 2013-11-17

    上傳用戶:lo25643

  • 基于DSP的新型柴油發電機勵磁控制系統研究

    在綜合分析諧波勵磁無刷同步發電機勵磁控制系統的基礎上,對其勵磁控制策略進行了研究,開發了一套基于DSP( TMS320F2812) 控制的新型柴油發電機勵磁控制系統,該系統采用參數自適應模糊PID 控制勵磁,選用交流采樣方式實時檢測各信號的瞬時特性,系統仿真結果以及在1 臺25 kW 工頻柴油發電機上的試驗結果證明了該控制器具有較好的電壓調節特性,系統穩態和暫態性能完全滿足發電機對勵磁系統的要求。關鍵詞:勵磁調節;模糊PID 控制;數字信號處理器;交流采樣 Abstract :According to the general analysis of the excitation cont rol system of the harmonious wave excitation brushless synchronous generator and it s characteristics ,a new type of diesel generator excitation cont rol system based on DSP( TMS320F2812) was designed. An adaptive fuzzy PID cont rol of excitation is used in this system. To detect the t ransient characteristics of the signals in a timely manner ,AC sampling was applied.The system simulation result s and the testing result s f rom a 25 kW diesel generator (50 Hz) can prove that the voltage regulation characteristics of the excitation cont rol system are very well ,and both the steadyOstate performance and the t ransient performance of the generator are also good.Key words :excitation cont rol ;fuzzy PID cont rol ;digital signal processor (DSP) ;AC sampling

    標簽: DSP 柴油發電機 勵磁控制 系統研究

    上傳時間: 2013-10-29

    上傳用戶:fxf126@126.com

  • 基于DSP的ATV-ATT中控系統設計

    設計一種應用于某全地形ATV車載武器裝置中的中控系統,該系統設計是以TMS320F2812型DSP為核心,采用模塊化設計思想,對其硬件部分進行系統設計,能夠完成對武器裝置高低、回轉方向的運動控制,實現靜止或行進狀態中對目標物的測距,自動瞄準以及按既定發射模式發射彈丸和各項安全性能檢測等功能。通過編制相應的軟件,對其進行系統調試,驗證了該設計運行穩定。 Abstract:  A central control system applied to an ATV vehicle weapons is designed. The system design is based on TMS320F2812 DSP as the core, uses modular design for its hardware parts. The central control system can complete the motion control of the level of weapons and equipment, rotation direction, to achieve a state of static or moving objects on the target ranging, auto-targeting and according to the established target and the projectile and the launch of the security performance testing and other functions. Through the development of appropriate software and to carry out system testing to verify the stability of this design and operation.

    標簽: ATV-ATT DSP 中控系統

    上傳時間: 2013-11-02

    上傳用戶:jshailingzzh

  • 基于DSP的車載雷達測速系統設計

    針對運行中火車測速運用多普勒效應采用DSP 設計雷達測速系統并闡述了其基本設計思想與工作原理給出系統硬件軟件設計結構和原理圖改善了原有光電測速精度提高了系統工作穩定性和可靠性經實驗證明DSP 采集板工作穩定測速效果好關鍵詞DSP; 雷達測速; 多普勒效應 On Board DSP-Based Radar Speed Measurement System TANG Wei, SUN Zhi-fang, CHEN Quan (Dept.of computer Science,Yangtze University,Jingzhou 434023,China)Abstract: This paper presents a DSP-based train speed measurement by using Doppler radar. The structure of the system is introduced.The hardware and software are also discussed.Key words: DSP; rader speed measurement; doppler principle

    標簽: DSP 車載 系統設計 雷達測速

    上傳時間: 2013-10-27

    上傳用戶:003030

  • 采用TüV認證的FPGA開發功能安全系統

    This white paper discusses how market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs. Introduction The basic motivation of deploying functional safety systems is to ensure safe operation as well as safe behavior in cases of failure. Examples of functional safety systems include train brakes, proximity sensors for hazardous areas around machines such as fast-moving robots, and distributed control systems in process automation equipment such as those used in petrochemical plants. The International Electrotechnical Commission’s standard, IEC 61508: “Functional safety of electrical/electronic/programmable electronic safety-related systems,” is understood as the standard for designing safety systems for electrical, electronic, and programmable electronic (E/E/PE) equipment. This standard was developed in the mid-1980s and has been revised several times to cover the technical advances in various industries. In addition, derivative standards have been developed for specific markets and applications that prescribe the particular requirements on functional safety systems in these industry applications. Example applications include process automation (IEC 61511), machine automation (IEC 62061), transportation (railway EN 50128), medical (IEC 62304), automotive (ISO 26262), power generation, distribution, and transportation. 圖Figure 1. Local Safety System

    標簽: FPGA 安全系統

    上傳時間: 2013-11-05

    上傳用戶:維子哥哥

  • 《器件封裝用戶向導》賽靈思產品封裝資料

    Introduction to Xilinx Packaging Electronic packages are interconnectable housings for semiconductor devices. The major functions of the electronic packages are to provide electrical interconnections between the IC and the board and to efficiently remove heat generated by the device. Feature sizes are constantly shrinking, resulting in increased number of transistors being packed into the device. Today's submicron technology is also enabling large-scale functional integration and system-on-a-chip solutions. In order to keep pace with these new advancements in silicon technologies, semiconductor packages have also evolved to provide improved device functionality and performance. Feature size at the device level is driving package feature sizes down to the design rules of the early transistors. To meet these demands, electronic packages must be flexible to address high pin counts, reduced pitch and form factor requirements. At the same time,packages must be reliable and cost effective.

    標簽: 封裝 器件 用戶 賽靈思

    上傳時間: 2013-10-22

    上傳用戶:ztj182002

  • Analog Solutions for Xilinx FPGAs

    Designing withProgrammable Logicin an Analog WorldProgrammable logic devicesrevolutionized digital design over 25years ago, promising designers a blankchip to design literally any functionand program it in the field. PLDs canbe low-logic density devices that usenonvolatile sea-of-gates cells calledcomplex programmable logic devices(CPLDs) or they can be high-densitydevices based on SRAM look-up tables

    標簽: Solutions Analog Xilinx FPGAs

    上傳時間: 2013-11-01

    上傳用戶:a67818601

  • WP369可擴展式處理平臺-各種嵌入式系統的理想解決方案

    WP369可擴展式處理平臺-各種嵌入式系統的理想解決方案 :Delivering unrivaled levels of system performance,flexibility, scalability, and integration to developers,Xilinx's architecture for a new Extensible Processing Platform is optimized for system power, cost, and size. Based on ARM's dual-core Cortex™-A9 MPCore processors and Xilinx’s 28 nm programmable logic,the Extensible Processing Platform takes a processor-centric approach by defining a comprehensive processor system implemented with standard design methods. This approach provides Software Developers a familiar programming environment within an optimized, full featured,powerful, yet low-cost, low-power processing platform.

    標簽: 369 WP 擴展式 處理平臺

    上傳時間: 2013-10-22

    上傳用戶:685

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