FeaturesThe following standard features are provided.• Choice of RTOS scheduling policy1. Pre-emptive:Always runs the highest available task. Tasks of identical priorityshare CPU time (fully pre-emptive with round robin time slicing).2. Cooperative:Context switches only occur if a task blocks, or explicitly callstaskYIELD().• Co-routines (light weight tasks that utilise very little RAM).• Message queues• Semaphores [via macros]• Trace visualisation ability (requires more RAM)• Majority of source code common to all supported development tools• Wide range of ports and examples
上傳時(shí)間： 2013-10-13
上傳用戶：13162218709
文章提出了一種精簡(jiǎn)指令集8 位單片機(jī)中, 算術(shù)邏輯單元的工作原理。在此基礎(chǔ)上, 對(duì)比傳統(tǒng)PIC 方案、以及在ALU 內(nèi)部再次采用流水線作業(yè)的332 方案、44 方案, 并用Synopsys 綜合工具實(shí)現(xiàn)了它們。綜合及仿真結(jié)果表明, 根據(jù)該單片機(jī)系統(tǒng)要求, 44 方案速度最高, 比332 方案可提高43.9%, 而面積僅比最小的332 方案增加1.6%。在分析性能差異的根本原因之后, 闡明了該方案的優(yōu)越性。關(guān)鍵詞: 單片機(jī), 精簡(jiǎn)指令集, 算術(shù)邏輯單元, 流水線 Abstract: Work principle for ALU in an 8_bit RISC Singlechip microcomputer is described. The traditional PIC scheme, 332 Pipeline scheme and 44 Pipeline scheme are compared on the base of the principle, which are implemented using Synopsys design tools. Results from synthesis and simulation shows that 44 scheme operates the fast, which is 43.9% faster and only 1.6% larger than 332 scheme. The essential reason why the performance is so different is analyzed.Then the advantage of 44 scheme is clarified.Key words: Singlechip, Microcomputer, RISC, ALU, Pipeline
上傳時(shí)間： 2013-10-18
上傳用戶：xiaoyaa
winCE msdn講座 XP Embedded Now and the future Windows XP Embedded Developmentand Deployment Model OverviewWindows XP Embedded Component ModelWindows XP Embedded Studio Tools Microsoft WindowsXP Embedded Product Highlights Componentized version of Windows XP Professional~ 12,000 components and updates as of Service Pack 2Flexible localizationSame binaries and API as Windows XP ProfessionalHotfixes and service packsEmbedded Enabling FeaturesRuns on standard PC hardwareSupports boot on hard drives, compact flash, DiskOnChipand read-only mediaSupport for remote install and remote bootHeadless device and remote management supportIntegration with Microsoft management tools
上傳時(shí)間： 2013-10-31
上傳用戶：jrsoft
基于ADSP-BF561的數(shù)字?jǐn)z像系統(tǒng)設(shè)計(jì)Design of Digital Video Camera System Based on Digital Signal ProcessorADSP-BF561（浙江大學(xué) 信息與通信工程研究所，浙江 杭州 310027） 馬海杰, 劉云海摘要：介紹了基于ADI雙核的數(shù)字信號(hào)處理芯片ADSP-BF561 的數(shù)字?jǐn)z像系統(tǒng)實(shí)現(xiàn)方案。系統(tǒng)包括硬件和軟件兩部分，硬件主要有ADSP-BF561及其外圍電路、音視頻模數(shù)/數(shù)模轉(zhuǎn)換、CF卡/微硬盤接口等部分。軟件主要有操作系統(tǒng)及音視頻編解碼算法等部分。關(guān)鍵詞：ADSP-BF561 ;數(shù)字?jǐn)z像機(jī);微硬盤;MPEG-4;A/D;D/A中圖分類號(hào):TN948.41文獻(xiàn)標(biāo)識(shí)碼:AAbstract: An implementation of digital video camera system based on ADI dual core digital signal processor ADSP-BF561 is introduced. The system can be divided into two parts——hardware and software design. The hardware design includes ADSP-BF561 and perpheral apparatus, A/D,D/A, CF card or Microdrive and so on. The software includes operating system , audio and video coding algorithm.Key words: ADSP-BF561; digital video camera; microdrive; MPEG-4;A/D;D/A
標(biāo)簽： ADSP-BF 561 數(shù)字?jǐn)z像 系統(tǒng)設(shè)計(jì)
上傳時(shí)間： 2013-11-10
上傳用戶：yl1140vista
為了擴(kuò)大監(jiān)控范圍，提高資源利用率，降低系統(tǒng)成本，提出了一種多通道視頻切換的解決方案。首先從視頻信號(hào)分離出行場(chǎng)信號(hào)，然后根據(jù)行場(chǎng)信號(hào)由DSP和FPGA產(chǎn)生控制信號(hào)，控制多路視頻通道之間的切換，從而實(shí)現(xiàn)讓一個(gè)視頻處理器同時(shí)監(jiān)控不同場(chǎng)景。實(shí)驗(yàn)結(jié)果表明，該方案可以在視頻監(jiān)控告警系統(tǒng)中穩(wěn)定、可靠地實(shí)現(xiàn)視頻通道的切換。 Abstract: To expand the scope of monitoring， improve resource utilization， reduce system cost， a multiple video channels signal switching method is pointed out in this paper. First， horizontal sync signal and field sync signal from the video signal are separated， then control signal according to the sync signal by DSP and FPGA is generated to control the switching between multiple video channels. Thus， it achieves to make a video processor to monitor different place. Experimental results show that the method can realize video channel switching reliably， and is applied in the video monitoring warning system successfully.
上傳時(shí)間： 2013-11-09
上傳用戶：不懂夜的黑
The SDI standards are the predominant standards for uncompressed digital videointerfaces in the broadcast studio and video production center. The first SDI standard,SD-SDI, allowed standard-definition digital video to be transported over the coaxial cableinfrastructure initially installed in studios to carry analog video. Next, HD-SDI wasto support high-definition video. Finally, dual link HD-SDI and 3G-SDIdoubled the bandwidth of HD-SDI to support 1080p (50 Hz and 60 Hz) and other videoformats requiring more bandwidth than HD-SDI provides.
上傳時(shí)間： 2013-10-08
上傳用戶：yjj631
This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board
標(biāo)簽： XAPP 740 AXI 互聯(lián)
上傳時(shí)間： 2013-11-14
上傳用戶：fdmpy
VGA 是視頻圖形陣列（Video Graphics Array）的簡(jiǎn)稱，是IBM 于1987 年提出的一個(gè)使用模擬信號(hào)的圖形顯示標(biāo)準(zhǔn)。最初的VGA 標(biāo)準(zhǔn)最大只能支持640*480 分辨率的顯示器，而為了適應(yīng)大屏幕的應(yīng)用，視頻電氣標(biāo)準(zhǔn)化組織VESA（Video Electronics StandardsAssociation 的簡(jiǎn)稱）將VGA 標(biāo)準(zhǔn)擴(kuò)展為SVGA 標(biāo)準(zhǔn)，SVGA 標(biāo)準(zhǔn)能夠支持更大的分辨率。人們通常所說(shuō)的VGA 實(shí)際上指的就是VESA 制定的SVGA 標(biāo)準(zhǔn)。(1). VGA 接口VGA 采用15 針的接口，用于顯示的接口信號(hào)主要有5 個(gè)：1 個(gè)行同步信號(hào)、1 個(gè)場(chǎng)同步信號(hào)以及3 個(gè)顏色信號(hào)，接口還包含自測(cè)試以及地址碼信號(hào)，一般由不同的制造商定義，主要用來(lái)進(jìn)行測(cè)試及支持其它功能。
上傳時(shí)間： 2013-10-27
上傳用戶：541657925
MPEG（Moving Picture Experts Group）和VCEG（Video Coding Experts Group）已經(jīng)聯(lián)合開(kāi)發(fā)了一個(gè)比早期研發(fā)的MPEG 和H.263 性能更好的視頻壓縮編碼標(biāo)準(zhǔn)，這就是被命名為AVC（Advanced Video Coding），也被稱為ITU-T H.264 建議和MPEG-4 的第10 部分的標(biāo)準(zhǔn)，簡(jiǎn)稱為H.264/AVC 或H.264。這個(gè)國(guó)際標(biāo)準(zhǔn)已經(jīng)與2003 年3 月正式被ITU-T 所通過(guò)并在國(guó)際上正式頒布。為適應(yīng)高清視頻壓縮的需求，2004 年又增加了FRExt 部分；為適應(yīng)不同碼率及質(zhì)量的需求，2006 年又增加了可伸縮編碼 SVC。
上傳時(shí)間： 2013-11-19
上傳用戶：dancnc
The field of microelectromechanical systems (MEMS), particularly micromachinedmechanical transducers, has been expanding over recent years, and the productioncosts of these devices continue to fall. Using materials, fabrication processes, anddesign tools originally developed for the microelectronic circuits industry, newtypes of microengineered device are evolving all the time—many offering numerousadvantages over their traditional counterparts. The electrical properties of siliconhave been well understood for many years, but it is the mechanical properties thathave been exploited in many examples of MEMS. This book may seem slightlyunusual in that it has four editors. However, since we all work together in this fieldwithin the School of Electronics and Computer Science at the University of Southampton,it seemed natural to work together on a project like this. MEMS are nowappearing as part of the syllabus for both undergraduate and postgraduate coursesat many universities, and we hope that this book will complement the teaching thatis taking place in this area.
上傳時(shí)間： 2013-10-16
上傳用戶：朗朗乾坤
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