This an adaptive receiver for a direct-sequence spread spectrum (DS-SS) system over an AWGN channel. The adaptive receiver block is modified from the LMS adaptive filter block in DSP Blockset. For DS-SS signal reception, the adaptive filter needs to have multi-rate operation. The input sample rate is equal to chip rate and the output is at symbol rate. Two rates are related by PG, processing gain
a collection of M-files to study concepts in the following areas of Fuzzy-Set-Theory: Fuzzy or Multivalued Logic, The Calculus of Fuzzy, Quantities, Approximate Reasoning, Possibility Theory, Fuzzy Control, Neuro-Fuzzy Systems.
Description: FASBIR(Filtered Attribute Subspace based Bagging with Injected Randomness) is a variant of Bagging algorithm, whose purpose is to improve accuracy of local learners, such as kNN, through multi-model perturbing ensemble.
Reference: Z.-H. Zhou and Y. Yu. Ensembling local learners through multimodal perturbation. IEEE Transactions on Systems, Man, and Cybernetics - Part B: Cybernetics, 2005, vol.35, no.4, pp.725-735.
This the specification of the Enterprise JavaBeansTM architecture.The Enterprise JavaBeans
architecture is a component architecture for the development and deployment of componentbased
distributed business applications. Applications written using the Enterprise JavaBeans
architecture are scalable, transactional, and multi-user secure. These applications may be written
once, and then deployed on any server platform that supports the Enterprise JavaBeans
specification.
The project KEIL_IODemo shows how to use memory allocation routines (malloc) and char I/O (printf, scanf) via a serial interface with the Keil ARM toolchain.
The I/O functions are adapted for the Analog Devices ADuC7000 series using the SERIAL.C module.
The example also shows the efficiency of the Keil CA ARM Compiler run-time library which is tuned for single chip systems.
UART I/O and Memory Allocation Example for GNU
The project GNU_IODemo shows how to use memory allocation routines (malloc) and char I/O (printf, scanf) via a serial interface with the GNU toolchain.
The I/O functions are adapted for the Analog Devices ADuC7000 series using the SERIAL.C module.
The example also shows the efficiency of the Keil CA ARM Compiler run-time library which is tuned for single chip systems.
This a full 3-tier dababase application which includes a activex dll project(business objects) and a standard exe(UI). Besides all the database techniques it demonstrates, it also shows how to make MSHFlexgrid a editable grid(with combobox, checkbox, datetimepicker) and how to merge a toolbar for multi forms.
VHDL 關(guān)于2DFFT設(shè)計(jì)程序
u scinode1 ∼ scinode9.vhd: Every SCI node RTL vhdl code. The details can be
seen in the following section.
u 2dfft.vhd: The top module includes these scinodes and form a 3x3 SCI Torus
network, and it support these sub-modules scinode1∼ scinode9 reset and clk
and global_cnt signals to synchronous the sub-modules to simplify the overall
design.
u proj2.wfc: VSS simulation result that is the same as the ModelSim simulation
result.
u Pro2_2.wfc: VSS simulation result of another test pattern can’t cause overflow
situation.