This manual describes SAMSUNG s S3C2410A 16/32-bit RISC microprocessor. This product is designed to provide hand-held devices and general applications with cost-effective, low-power, and high-performance micro-controller solution in small die size. To reduce total system cost, the S3C2410A includes the following components separate 16KB Instruction and 16KB Data Cache, MMU to handle virtual memory management, LCD Controller (STN & TFT), NAND Flash Boot Loader, System Manager (chip select logic and SDRAM Controller), 3-ch UART, 4-ch DMA, 4-ch Timers with PWM, I/O Ports, RTC, 8-ch 10-bit ADC and Touch Screen Interface, IIC-BUS Interface, IIS-BUS Interface, USB Host, USB Device, SD Host & Multi-Media Card Interface, 2-ch SPI and PLL for clock generation.
標簽： This microprocessor describes S3C2410A
上傳時間： 2013-11-30
上傳用戶：GavinNeko
關于DM642的外設的例程，包含mcbsp、flash、sdram、timer，是培訓例程。
上傳時間： 2017-06-19
上傳用戶：bcjtao
nios ii cpu核，包含通用IO口、sdram、flash、uart
上傳時間： 2017-06-23
上傳用戶：xsnjzljj
alter FPGA，包含sdram的nios系統開發實驗完整工程文件
上傳時間： 2017-07-04
上傳用戶：qiao8960
smdk441f monitor program. 用ADS1.2編譯，用USB下載文件到sdram,進行調試。
上傳時間： 2014-11-24
上傳用戶：1583060504
dsp常見的擴展外設的框架程序和測試程序，包括abtsram uart Timer Sdram IIC Flash Esam等
上傳時間： 2014-01-03
上傳用戶：windwolf2000
This directory contains an example ADSP-BF533 subroutine that demonstrates how to create a loader file for the BF533 EZ-KIT, initialization code to load a program from SDRAM, and use the FlashProgrammer utility to download the file to the flash.
標簽： demonstrates subroutine directory contains
上傳時間： 2017-07-30
上傳用戶：asasasas
S3c2440硬件測試程序，主要功能包括：SDRAM讀寫測試，整片Falsh讀寫測試，Flash擦除，壞塊檢測，flash復制數據到SDRAM
上傳時間： 2017-08-03
上傳用戶：541657925
對vga接口做了詳細的介紹，并且有一 ·三段式Verilog的IDE程序，但只有DMA ·電子密碼鎖，基于fpga實現，密碼正 ·IIR、FIR、FFT各模塊程序設計例程， ·基于邏輯工具的以太網開發，基于邏 ·自己寫的一個測溫元件（ds18b20）的 ·光纖通信中的SDH數據幀解析及提取的 ·VHDL Programming by Example（McGr ·這是CAN總線控制器的IP核，源碼是由 ·FPGA設計的SDRAM控制器，有仿真代碼 ·xilinx fpga 下的IDE控制器原代碼, ·用verilog寫的，基于查表法實現的LO ·精通verilog HDL語言編
上傳時間： 2014-12-04
上傳用戶：colinal
This manual describes SAMSUNG s S3C2410X 16/32-bit RISC microprocessor. This product is designed to provide hand-held devices and general applications with cost-effective, low-power, and high-performance microcontroller solution in small die size. To reduce total system cost, the S3C2410X includes the following components separate 16KB Instruction and 16KB Data Cache, MMU to handle virtual memory management, LCD Controller (STN & TFT), NAND Flash Boot Loader, System Manager (chip select logic and SDRAM Controller), 3-ch UART, 4-ch DMA, 4-ch Timers with PWM, I/O Ports, RTC, 8-ch 10-bit ADC and Touch Screen Interface, IIC-BUS Interface, IIS-BUS Interface, USB Host, USB Device, SD Host & Multi-Media Card Interface, 2-ch SPI and PLL for clock generation.
標簽： This microprocessor describes S3C2410X
上傳時間： 2014-01-11
上傳用戶：shizhanincc
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