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CSHARP-solution

  • 使用軟件程序仿真C500微控制器系列SSC(同步串行通道)功

    The solution presented in this paper and in the attached source files emulates the mostimportant SSC functions by using SW routines implemented in C. The code is focused onthe SAB C513, but will fit to all C500 derivatives.Beyond the low level software drivers a test shell is delivered. This shell allows a quicktest of the software drivers by an emulator or a starter kit demo board.

    標簽: C500 SSC 軟件 程序

    上傳時間: 2013-11-24

    上傳用戶:363186

  • at89c52 pdf

    The AT89C52 is a low-power, high-performance CMOS 8-bit microcomputer with 8Kbytes of Flash programmable and erasable read only memory (PEROM). The deviceis manufactured using Atmel’s high-density nonvolatile memory technology and iscompatible with the industry-standard 80C51 and 80C52 instruction set and pinout.The on-chip Flash allows the program memory to be reprogrammed in-system or by aconventional nonvolatile memory programmer. By combining a versatile 8-bit CPUwith Flash on a monolithic chip, the Atmel AT89C52 is a powerful microcomputerwhich provides a highly-flexible and cost-effective solution to many embedded controlapplications.

    標簽: 89c c52 at

    上傳時間: 2013-11-10

    上傳用戶:1427796291

  • Employing a Single-Chip Transceiver in Femtocell Base-Station Applications

    Abstract: This application note discusses the development and deployment of 3G cellular femtocell base stations. The technicalchallenges for last-mile residential connectivity and adding system capacity in dense urban environments are discussed, with 3Gfemtocell base stations as a cost-effective solution. Maxim's 3GPP TS25.104-compliant transceiver solution is presented along withcomplete radio reference designs such as RD2550. For more information on the RD2550, see reference design 5364, "FemtocellRadio Reference Designs Using the MAX2550–MAX2553 Transceivers."

    標簽: Base-Station Applications Single-Chip Transceiver

    上傳時間: 2013-11-07

    上傳用戶:songrui

  • 6小時學會labview

    6小時學會labview, labview Six Hour Course – Instructor Notes   This zip file contains material designed to give students a working knowledge of labview in a 6 hour timeframe. The contents are: Instructor Notes.doc – this document. labviewIntroduction-SixHour.ppt – a PowerPoint presentation containing screenshots and notes on the topics covered by the course. Convert C to F (Ex1).vi – Exercise 1 solution VI. Convert C to F (Ex2).vi – Exercise 2 solution subVI. Thermometer-DAQ (Ex2).vi – Exercise 2 solution VI. Temperature Monitor (Ex3).vi – Exercise 3 solution VI. Thermometer (Ex4).vi – Exercise 4 solution subVI. Convert C to F (Ex4).vi – Exercise 4 solution subVI. Temperature Logger (Ex4).vi – Exercise 4 solution VI. Multiplot Graph (Ex5).vi – Exercise 5 solution VI. Square Root (Ex6).vi – Exercise 6 solution VI. State Machine 1 (Ex7).vi – Exercise 7 solution VI.   The slides can be presented in two three hour labs, or six one hour lectures. Depending on the time and resources available in class, you can choose whether to assign the exercises as homework or to be done in class. If you decide to assign the exercises in class, it is best to assign them in order with the presentation. This way the students can create VI’s while the relevant information is still fresh. The notes associated with the exercise slide should be sufficient to guide the students to a solution. The solution files included are one possible solution, but by no means the only solution.

    標簽: labview

    上傳時間: 2013-10-13

    上傳用戶:zjwangyichao

  • 移動無線終端導航AFE和數據轉換器

    Abstract: High-speed and low-speed data converters serve critical functions in modern broadband mobile radios. This application note outlines how todetermine high-speed data converter performance requirements in baseband sampling radio architectures. Also, system partition strategies andadvantages are outlined when considering a high-speed analog front-end (AFE) solution.

    標簽: AFE 移動 無線終端 導航

    上傳時間: 2013-11-02

    上傳用戶:jjj0202

  • C#編程語言規范

    CSharp Language Specification

    標簽: 編程 語言規范

    上傳時間: 2013-11-02

    上傳用戶:cazjing

  • PCB Design Considerations and Guidelines for 0.4mm and 0.5mm WLPs

    Abstract: Using a wafer-level package (WLP) can reduce the overall size and cost of your solution.However when using a WLP IC, the printed circuit board (PCB) layout can become more complex and, ifnot carefully planned, result in an unreliable design. This article presents some PCB designconsiderations and general recommendations for choosing a 0.4mm- or 0.5mm-pitch WLP for yourapplication.

    標簽: Considerations Guidelines and Design

    上傳時間: 2013-11-09

    上傳用戶:ls530720646

  • Employing a Single-Chip Transceiver in Femtocell Base-Station Applications

    Abstract: This application note discusses the development and deployment of 3G cellular femtocell base stations. The technicalchallenges for last-mile residential connectivity and adding system capacity in dense urban environments are discussed, with 3Gfemtocell base stations as a cost-effective solution. Maxim's 3GPP TS25.104-compliant transceiver solution is presented along withcomplete radio reference designs such as RD2550. For more information on the RD2550, see reference design 5364, "FemtocellRadio Reference Designs Using the MAX2550–MAX2553 Transceivers."

    標簽: Base-Station Applications Single-Chip Transceiver

    上傳時間: 2013-11-05

    上傳用戶:超凡大師

  • XAPP708 -133MHz PCI-X到128MB DDR小型DIMM存儲器橋

      The Virtex-4 features, such as the programmable IDELAY and built-in FIFO support, simplifythe bridging of a high-speed, PCI-X core to large amounts of DDR-SDRAM memory. Onechallenge is meeting the PCI-X target initial latency specification. PCI-X Protocol Addendum tothe PCI Local Bus Specification Revision 2.0a ([Ref 6]) dictates that when a target signals adata transfer, "the target must do so within 16 clocks of the assertion of FRAME#." PCItermination transactions, such as Split Response/Complete, are commonly used to meet thelatency specifications. This method adds complexity to the design, as well as additional systemlatency. Another solution is to increase the ratio of the memory frequency to the PCI-X busfrequency. However, this solution increases the required power and clock resource usage.

    標簽: PCI-X XAPP DIMM 708

    上傳時間: 2013-11-24

    上傳用戶:18707733937

  • 西門子建筑電器-電氣安裝技術部發行的各類產品樣本

    西門子建筑電器-電氣安裝技術部發行的各類產品樣本:小型斷路器、剩余電流保護斷路器和模數化產品(中/ 英文)Miniature Circuit-Breakers, Residual Current Operated Circuit-Breakers and Modular Devices (Chinese/English)低壓熔斷器系統(中/ 英文)Fuse System (Chinese/English)雷擊,過電壓-不再是問題(中文)Thunderstorms - no problem (Chinese)西門子建筑電器目錄(中文)Electrical Installation Technology Catalog (Chinese)終端配電保護產品(中文)5 IN 1 (Chinese)SIKUS 和 STAB UNIVERSAL 目錄(中文)SIKUS and STAB UNIVERSAL Catalogue (Chinese)SIKUS HC 目錄(中文)SIKUS HC Catalogue (Chinese)SentronTM 母線槽 (中文)SentronTM Busway System (Chinese)SentronTM 母線槽系統快速選型 (準備中) (中文)SentronTM Busway System quick selection (in preparing) (Chinese)建筑低壓配電一體化解決方案-住宅小區應用(中文)Building LV PD Solution (Chinese)西門子 DELTA vista“遠景”系列開關和插座價目表(中文)Delta vista Switch and Socket Pricelist (Chinese)instabus EIB 面向未來的樓宇智能控制系統(中文)instabus EIB (Chinese)instabus EIB 面向未來的樓宇智能控制系統技術手冊 (準備中) (中文)instabus EIB technical handbook (in preparing) (Chinese)西門子電氣安裝技術業績卓越(中/ 英文)ET Reference Manual (Chinese/English)

    標簽: 西門子 電器 樣本 電氣安裝

    上傳時間: 2013-11-23

    上傳用戶:瓦力瓦力hong

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