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• Free ehternet mac using verilog downloaded in www.opencores.org免費(fèi)下載

  資源簡(jiǎn)介：Free ehternet mac using verilog downloaded in www.opencores.org

  標(biāo)簽： downloaded opencores ehternet verilog

  上傳時(shí)間： 2013-12-20

  上傳用戶：yzhl1988

• Using verilog-A in Advanced Design System免費(fèi)下載

  資源簡(jiǎn)介：Using verilog-A in Advanced Design System，英文版的關(guān)于verilog_A的相關(guān)介紹。

  標(biāo)簽： verilog-A Advanced Design System

  上傳時(shí)間： 2014-01-07

  上傳用戶：tb_6877751

• This project solves the purpose of creating vb6 application using oracle database in back end. It sh免費(fèi)下載

  資源簡(jiǎn)介：This project solves the purpose of creating vb6 application using oracle database in back end. It shows how to handle the record with the oracle. my other source codes are at: http://www.developerssourcecode.com Shyam Singh Chandel

  標(biāo)簽： application creating database project

  上傳時(shí)間： 2013-12-18

  上傳用戶：清風(fēng)冷雨

• This free cpu-ip! use verilog免費(fèi)下載

  資源簡(jiǎn)介：This free cpu-ip! use verilog

  標(biāo)簽： verilog cpu-ip This free

  上傳時(shí)間： 2015-04-02

  上傳用戶：lz4v4

• performance analysis in H.323 environments. Open H.323 Call Generator是一個(gè)OpenH323 (www.openh323.org)子免費(fèi)下載

  資源簡(jiǎn)介：performance analysis in H.323 environments. Open H.323 Call Generator是一個(gè)OpenH323 (www.openh323.org)子項(xiàng)目，用于H.323環(huán)境中的測(cè)試和性能分析。

  標(biāo)簽： 323 environments performance Generator

  上傳時(shí)間： 2015-04-09

  上傳用戶：ippler8

• A C++ library which finds associations within sets of items, using a fast in-memory algorithm免費(fèi)下載

  資源簡(jiǎn)介：A C++ library which finds associations within sets of items, using a fast in-memory algorithm

  標(biāo)簽： associations algorithm in-memory library

  上傳時(shí)間： 2015-04-27

  上傳用戶：bruce

• This m file models a DPSK UWB system using a delay in one leg of the mixer, correlation receiver low免費(fèi)下載

  資源簡(jiǎn)介：This m file models a DPSK UWB system using a delay in one leg of the mixer, correlation receiver low pass filter combination requiring no template for synching. Various waveforms are displayed throughout the system to allow the user to obse...

  標(biāo)簽： correlation receiver models system

  上傳時(shí)間： 2013-12-13

  上傳用戶：semi1981

• DVBstream is based on the ts-rtp package available at http://www.linuxtv.org. It broadcasts a (subs免費(fèi)下載

  資源簡(jiǎn)介：DVBstream is based on the ts-rtp package available at http://www.linuxtv.org. It broadcasts a (subset of a) DVB transport stream over a LAN using the rtp protocol. There were a couple of small bugs in the original ts-rtp application, whi...

  標(biāo)簽： broadcasts DVBstream available linuxtv

  上傳時(shí)間： 2013-11-30

  上傳用戶：sy_jiadeyi

• Using Design Patterns In Game Engines免費(fèi)下載

  資源簡(jiǎn)介：Using Design Patterns In Game Engines

  標(biāo)簽： Patterns Engines Design Using

  上傳時(shí)間： 2015-08-14

  上傳用戶：熊少鋒

• O Reilly最新IT類書(shū)籍(1218) OReilly.Unix.in.a.Nutshell.4th.Edition OReilly.Mac.OS.X.Tiger.in.a.Nutshell 免費(fèi)下載

  資源簡(jiǎn)介：O Reilly最新IT類書(shū)籍(1218) OReilly.Unix.in.a.Nutshell.4th.Edition OReilly.Mac.OS.X.Tiger.in.a.Nutshell OReilly.Monad OReilly.UML.2.0.in.a.Nutshell OReilly.Oracle.PL.SQL.for.DBAs OReilly.Open.Sources.2.0 OReilly.Applied.Software.Proje...

  標(biāo)簽： Nutshell OReilly Edition Reilly

  上傳時(shí)間： 2013-12-21

  上傳用戶：dancnc

• finacial application using excel add-in c C免費(fèi)下載

  資源簡(jiǎn)介：finacial application using excel add-in c C

  標(biāo)簽： application finacial add-in excel

  上傳時(shí)間： 2015-12-21

  上傳用戶：zhangyi99104144

• Windows NT/2000 Debugging Using the Built-In Kernel Debugger (i386kd)免費(fèi)下載

  資源簡(jiǎn)介：Windows NT/2000 Debugging Using the Built-In Kernel Debugger (i386kd)

  標(biāo)簽： Debugging Built-In Debugger Windows

  上傳時(shí)間： 2014-01-03

  上傳用戶：nanxia

• I wrote this code early this year using ColdFire MCF5213 in codewarrior IDE. The LCD is STN B/W 320x免費(fèi)下載

  資源簡(jiǎn)介：I wrote this code early this year using ColdFire MCF5213 in codewarrior IDE. The LCD is STN B/W 320x240 dot matrix LCD. The code include 3 different fonts, and basic LCD driver. All original!

  標(biāo)簽： this codewarrior ColdFire wrote

  上傳時(shí)間： 2013-12-20

  上傳用戶：皇族傳媒

• this a Uart source code using verilog.免費(fèi)下載

  資源簡(jiǎn)介：this a Uart source code using verilog.

  標(biāo)簽： verilog source using this

  上傳時(shí)間： 2016-05-19

  上傳用戶：zsjzc

• I developed an algorithm for using local ICA in denoising multidimensional data. It uses delay embed免費(fèi)下載

  資源簡(jiǎn)介：I developed an algorithm for using local ICA in denoising multidimensional data. It uses delay embedded version of the data, clustering and ICA for the separation between data and noise.

  標(biāo)簽： multidimensional developed algorithm denoising

  上傳時(shí)間： 2016-06-01

  上傳用戶：cc1915

• This m file models a DPSK UWB system using a delay in one leg of the mixer, correlation receiver low免費(fèi)下載

  資源簡(jiǎn)介：This m file models a DPSK UWB system using a delay in one leg of the mixer, correlation receiver low pass filter combination requiring no template for synching. Various waveforms are displayed throughout the system to allow the user to obse...

  標(biāo)簽： correlation receiver models system

  上傳時(shí)間： 2013-12-25

  上傳用戶：yyyyyyyyyy

• an introduction of using shortcut key in ultraedit免費(fèi)下載

  資源簡(jiǎn)介：an introduction of using shortcut key in ultraedit

  標(biāo)簽： introduction ultraedit shortcut using

  上傳時(shí)間： 2016-07-22

  上傳用戶：yoleeson

• Project file for MS Visual C++ 6.0. Requires GLUT DLL (www.opengl.org) Adjust program constants in免費(fèi)下載

  資源簡(jiǎn)介：Project file for MS Visual C++ 6.0. Requires GLUT DLL (www.opengl.org) Adjust program constants in Landscape.h and Utility.cpp. MAPS: Default map is read from HeghtXXX.raw where XXX is the MAP_SIZE (as defined in Landscape.h). If th...

  標(biāo)簽： constants Requires Project program

  上傳時(shí)間： 2014-12-03

  上傳用戶：LouieWu

• Full adder using verilog免費(fèi)下載

  資源簡(jiǎn)介：Full adder using verilog

  標(biāo)簽： verilog adder using Full

  上傳時(shí)間： 2014-12-01

  上傳用戶：yuchunhai1990

• This is an extension of sign example. You can design your own traffic sign by using verilog. And the免費(fèi)下載

  資源簡(jiǎn)介：This is an extension of sign example. You can design your own traffic sign by using verilog. And the result from verilog can be seen by the attached C file.

  標(biāo)簽： sign extension verilog example

  上傳時(shí)間： 2016-10-12

  上傳用戶：haohaoxuexi

• Log Shifter Gate Level Design using verilog(IC design Lab) and Lab Note免費(fèi)下載

  資源簡(jiǎn)介：Log Shifter Gate Level Design using verilog(IC design Lab) and Lab Note

  標(biāo)簽： Lab Shifter verilog Design

  上傳時(shí)間： 2016-12-01

  上傳用戶：cylnpy

• Hardware UDP, implementation of UDP based on Altera DE2 using verilog免費(fèi)下載

  資源簡(jiǎn)介：Hardware UDP, implementation of UDP based on Altera DE2 using verilog

  標(biāo)簽： implementation UDP Hardware verilog

  上傳時(shí)間： 2017-03-09

  上傳用戶：xiaodu1124

• Free business support system developed entirely in Sybase s PowerBuilder免費(fèi)下載

  資源簡(jiǎn)介：Free business support system developed entirely in Sybase s PowerBuilder

  標(biāo)簽： PowerBuilder developed business entirely

  上傳時(shí)間： 2017-03-16

  上傳用戶：fxf126@126.com

• Counter Module 8 using comportamental description in VHDL免費(fèi)下載

  資源簡(jiǎn)介：Counter Module 8 using comportamental description in VHDL

  標(biāo)簽： comportamental description Counter Module

  上傳時(shí)間： 2017-04-24

  上傳用戶：sdq_123

• this is sorce file for renesas microcontroller in which using timer RD in output compare mode.免費(fèi)下載

  資源簡(jiǎn)介：this is sorce file for renesas microcontroller in which using timer RD in output compare mode.

  標(biāo)簽： microcontroller compare renesas output

  上傳時(shí)間： 2014-01-16

  上傳用戶：wff

• Picking Up Perl is a freely redistributable tutorial book on Perl that can be downloaded in pdf, pos免費(fèi)下載

  資源簡(jiǎn)介：Picking Up Perl is a freely redistributable tutorial book on Perl that can be downloaded in pdf, postscript, or textinfo format. It can also be viewed online in html format, either as one large file or as separate files for each chapter.

  標(biāo)簽： Perl redistributable downloaded tutorial

  上傳時(shí)間： 2014-01-14

  上傳用戶：colinal

• Design FSM using verilog HDL.免費(fèi)下載

  資源簡(jiǎn)介：Design FSM using verilog HDL.

  標(biāo)簽： verilog Design using FSM

  上傳時(shí)間： 2017-05-04

  上傳用戶：lili123

• Using keyboard hooks in WinCE By Prathamesh S Kulkarni免費(fèi)下載

  資源簡(jiǎn)介：Using keyboard hooks in WinCE By Prathamesh S Kulkarni

  標(biāo)簽： Prathamesh Kulkarni keyboard Using

  上傳時(shí)間： 2013-11-30

  上傳用戶：dengzb84

• Shape Detection using Hough Transform in Matlab免費(fèi)下載

  資源簡(jiǎn)介：Shape Detection using Hough Transform in Matlab

  標(biāo)簽： Detection Transform Matlab Shape

  上傳時(shí)間： 2013-12-15

  上傳用戶：遠(yuǎn)遠(yuǎn)ssad

• MAC-4bit verilog source code with CSA style免費(fèi)下載

  資源簡(jiǎn)介：MAC-4bit verilog source code with CSA style

  標(biāo)簽： verilog source style code

  上傳時(shí)間： 2014-01-13

  上傳用戶：小碼農(nóng)lz