The PCF8578 is a low power CMOS1 LCD row and column driver, designed to drive dotmatrix graphic displays at multiplex rates of 1:8, 1:16, 1:24 or 1:32. The device has40 outputs, of which 24 are programmable and configurable for the following ratios ofrows/columns: 32¤8, 24¤16, 16¤24 or 8¤32. The PCF8578 can function as a stand-alone LCDcontroller and driver for use in small systems. For larger systems it can be used inconjunction with up to 32 PCF8579s for which it has been optimized. Together these twodevices form a general purpose LCD dot matrix driver chip set, capable of driving displaysof up to 40960 dots. The PCF8578 is compatible with most microcontrollers andcommunicates via a two-line bidirectional bus (I2C-bus). Communication overhead isminimized by a display RAM with auto-incremented addressing and display bankswitching.
標(biāo)簽： 8578 PCF LCD 圖形點(diǎn)陣
上傳時(shí)間： 2013-10-23
上傳用戶：頂?shù)弥?/p>
The SN65LBC170 and SN75LBC170 aremonolithic integrated circuits designed forbidirectional data communication on multipointbus-transmission lines. Potential applicationsinclude serial or parallel data transmission, cabledperipheral buses with twin axial, ribbon, ortwisted-pair cabling. These devices are suitablefor FAST-20 SCSI and can transmit or receivedata pulses as short as 25 ns, with skew lessthan 3 ns.These devices combine three 3-state differentialline drivers and three differential input linereceivers, all of which operate from a single 5-Vpower supply.The driver differential outputs and the receiverdifferential inputs are connected internally to formthree differential input/output (I/O) bus ports thatare designed to offer minimum loading to the buswhenever the driver is disabled or VCC = 0. Theseports feature a wide common-mode voltage rangemaking the device suitable for party-lineapplications over long cable runs.
上傳時(shí)間： 2013-10-13
上傳用戶：ytulpx
要搞清楚單片機(jī)與PLC的異同，首先得明確什幺是單片機(jī)，什幺是PLC。對此，我們簡要回顧一下計(jì)算機(jī)的發(fā)展歷程也許有幫助，按計(jì)算機(jī)專家的原始定義，計(jì)算機(jī)系統(tǒng)由五大部分--即控制單元（CU）、算術(shù)運(yùn)算單元（ALU）、存儲器（Memory）、輸入設(shè)備（Input）、輸出設(shè)備（Output）組成。早期計(jì)算機(jī)（晶體管的或集成電路的，不包括電子管的）的CU或ALU由一塊甚至多塊電路板組成，CU和ALU是分離的，隨著集成度的提高，CU和ALU合在一塊就組成了中央處理單元（CPU）,接著將CPU集成到單塊集成電路中就產(chǎn)生MPU或MCU,出現(xiàn)了如Intel4004、8008、8080，8085、8086、8088、Z80等MPU。此后，MPU的發(fā)展產(chǎn)生了兩條分支，一支往高性能、高速度、大容量方向發(fā)展，典型芯片如：Intel80186、286、386、486、586、P2、P3、P4等，速度從4.7MHz到現(xiàn)在的3.2GHz。另一支則往多功能方向發(fā)展，將存儲器(ROM、PROM、EPROM、EEPROM、FLASHROM、SRAM等)、輸入/出接口（Timer/Counter、PWM、ADC/DAC、UART、IIC、SPI、RTC、PCA、FPGA等）全部集成在一塊集成電路中而成為SOC。依愚之見，這就是當(dāng)今廣泛應(yīng)用的單片計(jì)算機(jī)，簡稱單片機(jī)。這一分支可謂品種繁多，位寬從8位到32位，引腳數(shù)從6個(gè)到幾百個(gè)，工作頻率從幾十KHz到幾百M(fèi)Hz,體系結(jié)構(gòu)既有CISC也有RISC,數(shù)不勝數(shù)。常用的有MCS-51系列、MCS-96系列、PIC系列、AVR系列、ARM7/9系列、TMS320系列、MSP430系列、MOTOROLA眾多的單片機(jī)等等。
上傳時(shí)間： 2013-10-16
上傳用戶：jjj0202
FEATURES400 MSPS internal clock speedIntegrated 10-bit DAC32-bit tuning wordPhase noise ≤ –120 dBc/Hz @ 1 kHz offset (DAC output)Excellent dynamic performance>75 dB SFDR @ 160 MHz (±100 kHz offset) AOUTSerial I/O control1.8 V power supplySoftware and hardware controlled power-down48-lead TQFP/EP packageSupport for 5 V input levels on most digital inputsPLL REFCLK multiplier (4× to 20×)Internal oscillator; can be driven by a single crystalPhase modulation capabilityMultichip synchronization
上傳時(shí)間： 2014-12-04
上傳用戶：axin881314
NXP Semiconductor designed the LPC2400 microcontrollers around a 16-bit/32-bitARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG andembedded Trace. The LPC2400 microcontrollers have 512 kB of on-chip high-speedFlash memory. This Flash memory includes a special 128-bit wide memory interface andaccelerator architecture that enables the CPU to execute sequential instructions fromFlash memory at the maximum 72 MHz system clock rate. This feature is available onlyon the LPC2000 ARM Microcontroller family of products. The LPC2400 can execute both32-bit ARM and 16-bit Thumb instructions. Support for the two Instruction Sets meansEngineers can choose to optimize their application for either performance or code size atthe sub-routine level. When the core executes instructions in Thumb state it can reducecode size by more than 30 % with only a small loss in performance while executinginstructions in ARM state maximizes core performance.
上傳時(shí)間： 2013-11-15
上傳用戶：zouxinwang
The PCA9674/74A provide general purpose remote I/O expansion for most microcontroller families via the two-line bidirectional bus (I2C-bus) and is a part of the Fast-mode Plus (Fm+) family.
上傳時(shí)間： 2013-10-28
上傳用戶：linyao
The PCA9536 is an 8-pin CMOS device that provides 4 bits of General Purpose parallel Input/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed to enhance the NXP Semiconductors family of I2C-bus I/O expanders. I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.
上傳時(shí)間： 2013-10-27
上傳用戶：w230825hy
The PCA9534 is a 16-pin CMOS device that provide 8 bits of General Purpose parallel Input/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed to enhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvements include higher drive capability, 5 V I/O tolerance, lower supply current, individual I/O configuration, 400 kHz clock frequency, and smaller packaging. I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.
上傳時(shí)間： 2013-11-17
上傳用戶：vodssv
The CAT25128 is a 128−Kb Serial CMOS EEPROM device internally organized as 16Kx8 bits. This features a 64−byte page write buffer and supports the Serial Peripheral Interface (SPI) protocol. The device is enabled through a Chip Select (CS) input. In addition, the required bus signals are clock input (SCK), data input (SI) and data output (SO) lines. The HOLD input may be used to pause any serial communication with the CAT25128 device. The device featuressoftware and hardware write protection, including partial as well as full array protection.
標(biāo)簽： 25128 EEPRO CMOS CAT
上傳時(shí)間： 2013-11-15
上傳用戶：fklinran
This application report discusses the design of non-invasive optical plethysmographyalso called as pulsoximeter using the MSP430FG437 Microcontroller (MCU). Thepulsoximeter consists of a peripheral probe combined with the MCU displaying theoxygen saturation and pulse rate on a LCD glass. The same sensor is used for bothheart-rate detection and pulsoximetering in this application. The probe is placed on aperipheral point of the body such as a finger tip, ear lobe or the nose. The probeincludes two light emitting diodes (LEDs), one in the visible red spectrum (660nm) andthe other in the infrared spectrum (940nm). The percentage of oxygen in the body isworked by measuring the intensity from each frequency of light after it transmitsthrough the body and then calculating the ratio between these two intensities.
標(biāo)簽： Pulsoximeter Single-Chip Des
上傳時(shí)間： 2013-10-27
上傳用戶：黑漆漆
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