<pre id="geok6"></pre> Telecommunication, satellite links and set-top boxes allrequire tuning a high frequency oscillator. The actualtuning element is a varactor diode, a 2-terminal device thatchanges capacitance as a function of reverse bias voltage.1 The oscillator is part of a frequency synthesizingloop, as detailed in Figure 1. A phase locked loop (PLL)compares a divided down representation of the oscillatorwith a frequency reference. The PLL’s output is levelshifted to provide the high voltage necessary to bias thevaractor, which closes a feedback loop by voltage tuningthe oscillator. This loop forces the voltage controlledoscillator (VCO) to operate at a frequency determined bythe frequency reference and the divider’s division ratio.
標(biāo)簽： 開關(guān)穩(wěn)壓器 低噪聲 上傳時間： 2013-12-20
上傳用戶：ABCDE
闡述了一個由上位PC機和AT89C52下位單片機組成的主從分布式溫度巡回檢測系統(tǒng)。主從機采用RS-485 串行通訊標(biāo)準(zhǔn)進行通信，可在下位單片機實現(xiàn)基本的溫度數(shù)據(jù)巡回檢測基礎(chǔ)上，由上位PC機實現(xiàn)綜合處理功能或擴展為遠程操作。整個系統(tǒng)具有巡檢速度快，擴展性好的特點。 Abstract: In this paper,a top PC and AT89C52 under-bit microcontrollers from the main component of the tour distributed temperature detection system is presented. Master and slave can use RS-485 serial communication standards for communications.Based on next-bit machine for basic goods temperature detected data Tour, the top can achieve the integrated treatment of PC functions or for the expansion of long-distance operation. The entire inspection system is fast, expansion.
上傳時間： 2013-10-13
上傳用戶：zhoujunzhen
我采用XC4VSX35或XC4VLX25 FPGA來連接DDR2 SODIMM和元件。SODIMM內(nèi)存條選用MT16HTS51264HY-667(4GB)，分立器件選用8片MT47H512M8。設(shè)計目標(biāo)：當(dāng)客戶使用內(nèi)存條時，8片分立器件不焊接；當(dāng)使用直接貼片分立內(nèi)存顆粒時，SODIMM內(nèi)存條不安裝。請問專家：1、在設(shè)計中，先用Xilinx MIG工具生成DDR2的Core后，管腳約束文件是否還可更改？若能更改，則必須要滿足什么條件下更改？生成的約束文件中，ADDR，data之間是否能調(diào)換？ 2、對DDR2數(shù)據(jù)、地址和控制線路的匹配要注意些什么？通過兩只100歐的電阻分別連接到1.8V和GND進行匹配 和 通過一只49.9歐的電阻連接到0.9V進行匹配，哪種匹配方式更好？ 3、V4中，PCB LayOut時，DDR2線路阻抗單端為50歐，差分為100歐？Hyperlynx仿真時，那些參數(shù)必須要達到那些指標(biāo)DDR2-667才能正常工作？ 4、 若使用DDR2-667的SODIMM內(nèi)存條，能否降速使用？比如降速到DDR2-400或更低頻率使用？ 5、板卡上有SODIMM的插座，又有8片內(nèi)存顆粒，則物理上兩部分是連在一起的，若實際使用時，只安裝內(nèi)存條或只安裝8片內(nèi)存顆粒，是否會造成信號完成性的影響？若有影響，如何控制？ 6、SODIMM內(nèi)存條(max:4GB)能否和8片分立器件(max:4GB)組合同時使用，構(gòu)成一個(max:8GB)的DDR2單元？若能，則布線阻抗和FPGA的DCI如何控制？地址和控制線的TOP圖應(yīng)該怎樣？ 7、DDR2和FPGA（VREF pin）的參考電壓0.9V的實際工作電流有多大？工作時候，DDR2芯片是否很燙，一般如何考慮散熱？ 8、由于多層板疊層的問題，可能頂層和中間層的銅箔不一樣后，中間的夾層后度不一樣時，也可能造成阻抗的不同。請教DDR2-667的SODIMM在8層板上的推進疊層？
上傳時間： 2013-10-12
上傳用戶：han_zh
UART 4 UART參考設(shè)計，Xilinx提供VHDL代碼 uart_vhdl This zip file contains the following folders: \vhdl_source -- Source VHDL files: uart.vhd - top level file txmit.vhd - transmit portion of uart rcvr.vhd - - receive portion of uart \vhdl_testfixture -- VHDL Testbench files. This files only include the testbench behavior, they do not instantiate the DUT. This can easily be done in a top-level VHDL file or a schematic. This folder contains the following files: txmit_tb.vhd -- Test bench for txmit.vhd. rcvr_tf.vhd -- Test bench for rcvr.vhd.
標(biāo)簽： UART Xilinx VHDL 參考設(shè)計
上傳時間： 2013-11-07
上傳用戶：jasson5678
針對當(dāng)前國內(nèi)外網(wǎng)站內(nèi)容管理系統(tǒng)（CMS）的背景以及發(fā)展的現(xiàn)狀，并對網(wǎng)站內(nèi)容管理系統(tǒng)以及相關(guān)理論和設(shè)計思想進行了探究，在此基礎(chǔ)上基于J2EE架構(gòu)平臺下，研究了基于Struts架構(gòu)的多層web應(yīng)用體系，選用目前最流行的框架組合Struts2、Spring和Hibernate分層架構(gòu)技術(shù)，提出了構(gòu)建一個基于JAVAEE平臺的網(wǎng)站后臺管理系統(tǒng)的方法，并給出了系統(tǒng)的框架設(shè)計，包括持久層、業(yè)務(wù)邏輯層和視圖層的設(shè)計。
標(biāo)簽： JAVAEE 網(wǎng)站 管理系統(tǒng) 架構(gòu)設(shè)計
上傳時間： 2013-10-13
上傳用戶：lty6899826
The #1 Step-by-Step Guide to labviewNow Completely Updated for labview 8! Master labview 8 with the industry's friendliest, most intuitive tutorial: labview for Everyone, Third Edition. Top labview experts Jeffrey Travis and Jim Kring teach labview the easy way: through carefully explained, step-by-step examples that give you reusable code for your own projects! This brand-new Third Edition has been fully revamped and expanded to reflect new features and techniques introduced in labview 8. You'll find two new chapters, plus dozens of new topics, including Project Explorer, AutoTool, XML, event-driven programming, error handling, regular expressions, polymorphic VIs, timed structures, advanced reporting, and much more. Certified labview Developer (CLD) candidates will find callouts linking to key objectives on NI's newest exam, making this book a more valuable study tool than ever. Not just what to d why to do it! Use labview to build your own virtual workbench Master labview's foundations: wiring, creating, editing, and debugging VIs; using controls and indicators; working with data structures; and much more Learn the "art" and best practices of effective labview development NEW: Streamline development with labview Express VIs NEW: Acquire data with NI-DAQmx and the labview DAQmx VIs NEW: Discover design patterns for error handling, control structures, state machines, queued messaging, and more NEW: Create sophisticated user interfaces with tree and tab controls, drag and drop, subpanels, and more Whatever your application, whatever your role, whether you've used labview or not, labview for Everyone, Third Edition is the fastest, easiest way to get the results you're after!
標(biāo)簽： Everyone LabVIEW for 英文
上傳時間： 2013-10-14
上傳用戶：shawvi
1．實驗要求 l 實驗?zāi)康模?（1）進一步掌握指針、異常處理的使用； （2）掌握棧的操作的實現(xiàn)方法； （3）培養(yǎng)使用棧解決實際問題的能力 l 實驗內(nèi)容：利用棧實現(xiàn)迷宮求解問題，具體要求如下： （1）可以使用遞歸或非遞歸兩種方法實現(xiàn)； （2）老鼠能夠記住自己的路，不會反復(fù)走重復(fù)的路徑； （3）可以自己任意設(shè)置起點； （4）必須要有異常處理，比如輸入?yún)?shù)錯誤時應(yīng)拋出異常 2. 程序分析 2.1 存儲結(jié)構(gòu) 該程序采用棧的順序存儲結(jié)構(gòu)，利用一組地址連續(xù)的存儲單元依次存放老鼠在迷宮中的每一步路徑，由于棧的插入和刪除只能在棧頂實現(xiàn)，因此，每前進一步，表示該點的數(shù)組元素入棧，棧頂指針top+1；每后退一步，表示原來點的數(shù)組元素出棧，top-1。棧的操作示意如圖(a)所示： 圖(a) 棧的操作示意圖
標(biāo)簽： 數(shù)據(jù)結(jié)構(gòu) 實驗報告 迷宮
上傳時間： 2013-11-08
上傳用戶：jasonheung
ExpressPCB 是一款免費的PCB設(shè)計軟件，簡單實使。可以畫雙層板。 Our Free PCB software is a snap to learn and use. For the first time, designing circuit boards is simple for the beginner and efficient for the professional. Our board manufacturing service makes top quality two and four layer PCBs. Use our MiniBoard service and pay only $51 for three boards (plus $8 shipping).
標(biāo)簽： ExpressPCB PCB 設(shè)計軟件
上傳時間： 2013-11-15
上傳用戶：lchjng
superpro 3000u 驅(qū)動 PIC16C65B@QFP44 [SA245] PIC16C65B: Part number QFP44: Package in QFP44 SA245: Adapter purchase number AM29DL320GT@FBGA48 [SA642+B026] AM29DL320GT: Part number FBGA48: Package in FBGA48 SA642: Adapter purchase number (Top board with socket) B026: Adapter purchase number (Bottom board, exchangable for different parts) 87C196CA@PLCC68(universal adapter) [PEP+S414T] 87C196CA: Part number PLCC68: Package in PLCC68 universal adapter: this adapter is valid for all parts in this package PEP: The PEP (Pin-driver Expansion Pack necessary to work with the adapter S414T) S414T: Adapter purchase number (Universal for all parts in this package) S71PL127J80B@FBGA64(special adapter) [(SA642A-B079A-Y096AF001)] S71PL127J80B: Part number FBGA64: Package in FBGA64 special adapter: this adapter is valid for this
標(biāo)簽： superpro 3000u 驅(qū)動 編程器軟件
上傳時間： 2013-10-23
上傳用戶：Avoid98
ExpressPCB 是一款免費的PCB設(shè)計軟件，簡單實使。可以畫雙層板。 Our Free PCB software is a snap to learn and use. For the first time, designing circuit boards is simple for the beginner and efficient for the professional. Our board manufacturing service makes top quality two and four layer PCBs. Use our MiniBoard service and pay only $51 for three boards (plus $8 shipping).
標(biāo)簽： ExpressPCB PCB 設(shè)計軟件
上傳時間： 2013-10-09
上傳用戶：1047385479
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