Jitter is extremely important in systems using PLL-based
clock drivers. The effects of jitter range from not having any
effect on system operation to rendering the system completely
non-functional. This application note provides the reader
with a clear understanding of jitter in high-speed systems. It
introduces the reader to various kinds of jitter in high-speed
systems, their causes and their effects, and methods of reducing
jitter. This application note will concentrate on jitter in PLL-based frequency synthesizers.
The present paper deals with the problem of calculating mean delays in polling systems
with either exhaustive or gated service. We develop a mean value analysis (MVA) to
compute these delay figures. The merits of MVA are in its intrinsic simplicity and its
intuitively appealing derivation. As a consequence, MVA may be applied, both in an
exact and approximate manner, to a large variety of models.
