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  • pci e PCB設計規范

    This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.  

    標簽: pci PCB 設計規范

    上傳時間: 2013-10-15

    上傳用戶:busterman

  • pci e PCB設計規范

    This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.  

    標簽: pci PCB 設計規范

    上傳時間: 2014-01-24

    上傳用戶:s363994250

  • A Waiter relays an order Object to a Producer, waits in an independent thread during the production,

    A Waiter relays an order Object to a Producer, waits in an independent thread during the production, and then delivers the result using a Consumer callback method.

    標簽: independent production Producer Waiter

    上傳時間: 2015-02-10

    上傳用戶:lepoke

  • Python Essential Reference, Second Edition

    Python Essential Reference, Second Edition

    標簽: Essential Reference Edition Python

    上傳時間: 2015-02-17

    上傳用戶:c12228

  • Inside C#, Second Edition

    Inside C#, Second Edition

    標簽: Edition Inside Second

    上傳時間: 2013-12-23

    上傳用戶:CSUSheep

  • Thinking in C++(Second Editon)

    Thinking in C++(Second Editon)

    標簽: Thinking Second Editon in

    上傳時間: 2013-12-17

    上傳用戶:tb_6877751

  • SIP. Understanding the Session Initiation Protocol Second Edition.rar全面介紹SIP RFC3261

    SIP. Understanding the Session Initiation Protocol Second Edition.rar全面介紹SIP RFC3261

    標簽: Understanding Initiation SIP Protocol

    上傳時間: 2015-03-10

    上傳用戶:hj_18

  • order發計算光子晶體的能帶結構

    order發計算光子晶體的能帶結構,比較好

    標簽: order 計算 光子晶體

    上傳時間: 2014-01-24

    上傳用戶:yimoney

  • TCP/IP Lean: Web Servers for Embedded Systems, Second Edition

    TCP/IP Lean: Web Servers for Embedded Systems, Second Edition

    標簽: Embedded Edition Servers Systems

    上傳時間: 2014-06-08

    上傳用戶:h886166

  • Intelligent Platform Management Interface Specification Second Generation v2.0

    Intelligent Platform Management Interface Specification Second Generation v2.0

    標簽: Specification Intelligent Generation Management

    上傳時間: 2015-04-05

    上傳用戶:zhichenglu

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