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proCessors

  • C algorithms for realtime Digital Signal proCessors

    C algorithms for realtime Digital Signal proCessors

    標簽: algorithms proCessors realtime Digital

    上傳時間: 2013-11-28

    上傳用戶:1966640071

  • INTRODUCTION TO DSP proCessors LABORATORY INSTRUCTION LAB GUIDLINES

    INTRODUCTION TO DSP proCessors LABORATORY INSTRUCTION LAB GUIDLINES

    標簽: INTRODUCTION INSTRUCTION proCessors LABORATORY

    上傳時間: 2013-12-20

    上傳用戶:BOBOniu

  • While faster proCessors, larger memory, and powerful graphics are fundamental requirements for works

    While faster proCessors, larger memory, and powerful graphics are fundamental requirements for workstations, users are also demanding a low-cost, solution-based approach wrapped around a standards-based technology. The Sun UltraTM 20 Workstation, which leverages the AMD OpteronTM processor with Direct Connect Architecture based on AMD64 technology, provides multiple operating system choices and leading nVidia graphics, delivers a platform that offers flexibility and performance in a cost-effective package with solutions to benefit customers across the board.

    標簽: requirements fundamental proCessors graphics

    上傳時間: 2017-08-17

    上傳用戶:zhaiye

  • C/C++ Compiler and Library Manual for Blackfin proCessors

    C/C++ Compiler and Library Manual for Blackfin proCessors

    標簽: proCessors Compiler Blackfin Library

    上傳時間: 2017-08-21

    上傳用戶:vodssv

  • LTC1099基于PC的數據采集板實現

    A complete design for a data acquisition card for the IBM PC is detailed in this application note. Additionally, C language code is provided to allow sampling of data at speed of more than 20kHz. The speed limitation is strictly based on the execution speed of the "C" data acquisition loop. A "Turbo" XT can acquire data at speeds greater than 20kHz. Machines with 80286 and 80386 proCessors can go faster than 20kHz. The computer that was used as a test bed in this application was an XT running at 4.77MHz and therefore all system timing and acquisition time measurements are based on a 4.77MHz clock speed.

    標簽: 1099 LTC 數據 采集板

    上傳時間: 2013-10-29

    上傳用戶:BOBOniu

  • P54C-VR奔騰(R)微處理器的電源模塊

      Providing power for the Pentium® microprocessor family isnot a trivial task by any means. In an effort to simplify thistask we have developed a new switching regulator controlcircuit and a new linear regulator to address the needs ofthese proCessors. Considerable time has been spent developingan optimized decoupling network. Here are severalcircuits using the new LTC®1266 synchronous buck regulatorcontrol chip and the LT®1584 linear regulator toprovide power for Pentium proCessors and Pentium VREproCessors. The Pentium processor has a supply requirementof 3.3V ±5%. The Pentium VRE processor requires3.500V ±100mV.

    標簽: C-VR 54 奔騰 微處理器

    上傳時間: 2013-11-01

    上傳用戶:名爵少年

  • 基于瑞薩電子微控制器的溫度控制系統設計

      為了提高傳統溫度控制系統的性能,將PID控制理論與嵌入式系統相結合,采用瑞薩電子公司的H8S/2166作為核心處理器,AD公司的AD7705以及熱敏電阻溫度傳感器作為溫度檢測單元,利用4×6小鍵盤、LCD顯示器和S1D13305液晶控制器達到良好的人機交互,設計出了一個應用于化工領域的嵌入式實時溫度控制系統。相比于傳統溫度控制系統,該系統提供了更強的計算能力和可擴展能力,采用增量PID控制算法實現復雜控制。通過實驗,該系統能達到0.1 ℃的溫度控制精度以及小于120 s的溫度穩定時間。   Abstract:   In order to improve the performance of conventional temperature control system, combining PID control theory with embedded systems, using the Renesas Electronics Corp. H8S/2166 micro-controller as a core proCessors, AD7705 and thermistor temperature sensor as a temperature detection unit and 4×6 small keyboard, LCD and S1D13305 LCD controller as a good human-computer interaction, this paper designed an embedded real-time temperature control system which is applied in chemical industry. Compared with conventional temperature control system, this system provides more computing power and extensibility, and adopts PID control algorithm for complex control. Through the experiment, the system can reach temperature control accuracy of 0.1 ℃ and temperature stabilization time of less than 120 seconds.

    標簽: 瑞薩電子 微控制器 溫度控制 系統設計

    上傳時間: 2014-12-26

    上傳用戶:003030

  • 基于C8051F020和Zigbee的汽車測試系統設計

    以C8051F020為核心處理器,設計無線傳感器網絡數據采集系統。系統采用SZ05-ADV型無線通訊模塊組建Zigbee無線網絡,結合嵌入式系統的軟硬件技術,完成終端節點的8路傳感器信號的數據采集。現場8路信號通過前端處理后,分別送入C8051F020的12位A/D轉換器進行轉換。經過精確處理、存儲后的現場數據,通過Zigbee無線網絡傳送到上位機,系統可達到汽車試驗中無線測試的目的。 Abstract:  This paper designs a wireless sensor network system for data acquisition with C8051F020 as core proCessors.The system used SZ05-ADV wireless communication module,set up a Zigbee wireless network, combined with hardware and software technologies of embedded systems,completed the end-node 8-locale sensor signal data acquisition.Eight locale signals were sent separately into the 12-bit ADC of C8051F020 for conversion through front treatment.After accurate processing and storage,the locale data was transmitted to the host computer through Zigbee wireless.The system achieves the purpose of wireless testing in vehicle trial.

    標簽: C8051F020 Zigbee 汽車測試 系統設計

    上傳時間: 2013-11-23

    上傳用戶:dsgkjgkjg

  • LLCR Pin Socket Testing with t

    LLCR Pin Socket Testing with the Model 3732 High Density Matrix Card Computer proCessors (CPUs) today have come a long way from the computer proCessors of the past. They draw more power, run at lower voltages, and have more pins than ever before.

    標簽: Testing Socket LLCR with

    上傳時間: 2013-10-24

    上傳用戶:whenfly

  • MPC106 PCI Bridge/Memory Contr

    In this document, the term Ô60xÕ is used to denote a 32-bit microprocessor from the PowerPC architecture family that conforms to the bus interface of the PowerPC 601ª, PowerPC 603ª, or PowerPC 604 microproCessors. Note that this does not include the PowerPC 602ª microprocessor which has a multiplexed address/data bus. 60x proCessors implement the PowerPC architecture as it is speciÞed for 32-bit addressing, which provides 32-bit effective (logical) addresses, integer data types of 8, 16, and 32 bits,and ßoating-point data types of 32 and 64 bits (single-precision and double-precision).1.1 Overview The MPC106 provides an integrated high-bandwidth, high-performance, TTL-compatible interface between a 60x processor, a secondary (L2) cache or additional (up to four total) 60x proCessors, the PCI bus,and main memory. This section provides a block diagram showing the major functional units of the 106 and describes brießy how those units interact.Figure 1 shows the major functional units within the 106. Note that this is a conceptual block diagram intended to show the basic features rather than an attempt to show how these features are physically implemented on the device.

    標簽: Bridge Memory Contr MPC

    上傳時間: 2013-10-08

    上傳用戶:18711024007

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