文中在pre-FFT定時同步算法的基礎上提出一個新的定時同步算法及其改進算法，該算法利用規則集對相關函數和導函數優化的方法得以進一步減小估計方差，本文在給出其推導過程的基礎上給出了仿真結果，并與相關算法進行比較，結果表明新算法的定時估計精度較高且具有一定的魯棒性。
上傳時間： 2013-10-29
上傳用戶：hebmuljb
12864液晶時鐘顯示程序 LCD 地址變量 ;**************變量的定義***************** RS BIT P2.0 ;LCD數據/命令選擇端(H/L) RW BIT P2.1 ;LCD讀/寫選擇端(H/L) EP BIT P2.2 ;LCD使能控制 PSB EQU P2.3 RST EQU P2.5 PRE BIT P1.4 ;調整鍵(K1) ADJ BIT P1.5 ;調整鍵(K2) COMDAT EQU P0 LED EQU P0.3 YEAR DATA 18H ;年,月,日變量 MONTH DATA 19H DATE DATA 1AH WEEK DATA 1BH HOUR DATA 1CH ;時,分,秒,百分之一秒變量 MIN DATA 1DH SEC DATA 1EH SEC100 DATA 1FH STATE DATA 23H LEAP BIT STATE.1 ;是否閏年標志1--閏年，0--平年 KEY_S DATA 24H ;當前掃描鍵值 KEY_V DATA 25H ;上次掃描鍵值 DIS_BUF_U0 DATA 26H ;LCD第一排顯示緩沖區 DIS_BUF_U1 DATA 27H DIS_BUF_U2 DATA 28H DIS_BUF_U3 DATA 29H DIS_BUF_U4 DATA 2AH DIS_BUF_U5 DATA 2BH DIS_BUF_U6 DATA 2CH DIS_BUF_U7 DATA 2DH DIS_BUF_U8 DATA 2EH DIS_BUF_U9 DATA 2FH DIS_BUF_U10 DATA 30H DIS_BUF_U11 DATA 31H DIS_BUF_U12 DATA 32H DIS_BUF_U13 DATA 33H DIS_BUF_U14 DATA 34H DIS_BUF_U15 DATA 35H DIS_BUF_L0 DATA 36H ;LCD第三排顯示緩沖區 DIS_BUF_L1 DATA 37H DIS_BUF_L2 DATA 38H DIS_BUF_L3 DATA 39H DIS_BUF_L4 DATA 3AH DIS_BUF_L5 DATA 3BH DIS_BUF_L6 DATA 3CH DIS_BUF_L7 DATA 3DH DIS_BUF_L8 DATA 3EH DIS_BUF_L9 DATA 3FH DIS_BUF_L10 DATA 40H DIS_BUF_L11 DATA 41H DIS_BUF_L12 DATA 42H DIS_BUF_L13 DATA 43H DIS_BUF_L14 DATA 44H DIS_BUF_L15 DATA 45H FLAG DATA 46H ;1-年，2-月，3-日，4-時，5-分，6-秒，7-退出調整。 DIS_H DATA 47H DIS_M DATA 48H DIS_S DATA 49H
上傳時間： 2013-11-09
上傳用戶：xingisme
The LogiCORE™ GTP Wizard automates the task of creating HDL wrappers to configure the high-speed serial GTP transceivers in Virtex™-5 LXT and SXT devices. The menu-driven interface allows one or more GTP transceivers to be configured using pre-definedtemplates for popular industry standards, or from scratch, to support a wide variety of custom protocols.The Wizard produces a wrapper, an example design, and a testbench for rapid integration and verification of the serial interface with your custom function Features• Creates customized HDL wrappers to configureVirtex-5 RocketIO™ GTP transceivers• Users can configure Virtex-5 GTP transceivers toconform to industry standard protocols usingpredefined templates, or tailor the templates forcustom protocols• Included protocol templates provide support for thefollowing specifications: Aurora, CPRI, FibreChannel 1x, Gigabit Ethernet, HD-SDI, OBSAI,OC3, OC12, OC48, PCI Express® (PCIe®), SATA,SATA II, and XAUI• Automatically configures analog settings• Each custom wrapper includes example design, testbench; and both implementation and simulation scripts
標簽： Transceiver Virtex Wizar GTP
上傳時間： 2013-10-20
上傳用戶：dave520l
12864液晶時鐘顯示程序 LCD 地址變量 ;**************變量的定義***************** RS BIT P2.0 ;LCD數據/命令選擇端(H/L) RW BIT P2.1 ;LCD讀/寫選擇端(H/L) EP BIT P2.2 ;LCD使能控制 PSB EQU P2.3 RST EQU P2.5 PRE BIT P1.4 ;調整鍵(K1) ADJ BIT P1.5 ;調整鍵(K2) COMDAT EQU P0 LED EQU P0.3 YEAR DATA 18H ;年,月,日變量 MONTH DATA 19H DATE DATA 1AH WEEK DATA 1BH HOUR DATA 1CH ;時,分,秒,百分之一秒變量 MIN DATA 1DH SEC DATA 1EH SEC100 DATA 1FH STATE DATA 23H LEAP BIT STATE.1 ;是否閏年標志1--閏年，0--平年 KEY_S DATA 24H ;當前掃描鍵值 KEY_V DATA 25H ;上次掃描鍵值 DIS_BUF_U0 DATA 26H ;LCD第一排顯示緩沖區 DIS_BUF_U1 DATA 27H DIS_BUF_U2 DATA 28H DIS_BUF_U3 DATA 29H DIS_BUF_U4 DATA 2AH DIS_BUF_U5 DATA 2BH DIS_BUF_U6 DATA 2CH DIS_BUF_U7 DATA 2DH DIS_BUF_U8 DATA 2EH DIS_BUF_U9 DATA 2FH DIS_BUF_U10 DATA 30H DIS_BUF_U11 DATA 31H DIS_BUF_U12 DATA 32H DIS_BUF_U13 DATA 33H DIS_BUF_U14 DATA 34H DIS_BUF_U15 DATA 35H DIS_BUF_L0 DATA 36H ;LCD第三排顯示緩沖區 DIS_BUF_L1 DATA 37H DIS_BUF_L2 DATA 38H DIS_BUF_L3 DATA 39H DIS_BUF_L4 DATA 3AH DIS_BUF_L5 DATA 3BH DIS_BUF_L6 DATA 3CH DIS_BUF_L7 DATA 3DH DIS_BUF_L8 DATA 3EH DIS_BUF_L9 DATA 3FH DIS_BUF_L10 DATA 40H DIS_BUF_L11 DATA 41H DIS_BUF_L12 DATA 42H DIS_BUF_L13 DATA 43H DIS_BUF_L14 DATA 44H DIS_BUF_L15 DATA 45H FLAG DATA 46H ;1-年，2-月，3-日，4-時，5-分，6-秒，7-退出調整。 DIS_H DATA 47H DIS_M DATA 48H DIS_S DATA 49H
上傳時間： 2013-12-25
上傳用戶：wvbxj
Locally weighted polynomial regression LWPR is a popular instance based al gorithm for learning continuous non linear mappings For more than two or three in puts and for more than a few thousand dat apoints the computational expense of pre dictions is daunting We discuss drawbacks with previous approaches to dealing with this problem
標簽： polynomial regression weighted instance
上傳時間： 2013-11-28
上傳用戶：sunjet
Description: C4.5Rule-PANE is a rule learning method which could generate accurate and comprehensible symbolic rules, through regarding a neural network ensemble as a pre-process of a rule inducer. Reference: Z.-H. Zhou and Y. Jiang. Medical diagnosis with C4.5 rule preceded by artificial neural network ensemble. IEEE Transactions on Information Technology in Biomedicine, 2003, vol.7, no.1, pp.37-42. 使用神經網絡集成方法診斷糖尿病,肝炎,乳腺癌癥的案例研究.
標簽： comprehensibl Description Rule-PANE accurate
上傳時間： 2013-11-30
上傳用戶：wcl168881111111
This companion disc contains the source code for the sample programs presented in INSIDE VISUAL C++ 5.0, as well as pre- compiled copies of the programs. To copy all of the sample code onto your hard disk, run the SETUP.EXE program and follow the instructions that appear on the screen. The sample code requires about 10 MB of hard disk space.
標簽： companion the presented contains
上傳時間： 2015-05-09
上傳用戶：mhp0114
fsmlabs的real time linux的內核，版本rtl-3.2-pre
上傳時間： 2013-12-25
上傳用戶：源弋弋
This companion disc contains the source code for the sample programs presented in INSIDE VISUAL C++ 5.0, as well as pre- compiled copies of the programs.
標簽： companion the presented contains
上傳時間： 2013-12-28
上傳用戶：windwolf2000
DSP/BIOS Driver Developer Kit 1.11 The DSP/BIOS Driver Developer Kit (DDK) provides a selection of pre-tested DSP/BIOS device drivers, and documentation on how to write a driver to the DSP/BIOS driver model, known as IOM. The DDK includes C source code for all drivers. The DDK 1.11 has been validated with CCS 3.1 and DSP/BIOS 5.20.
上傳時間： 2014-11-23
上傳用戶：maizezhen
