BIT_SELFREFRESH EQU (1<<22) ;定義SDRAM自刷新標志位 16 17 ;Pre-defined constants 預定義6種工作模式 18 USERMODE EQU 0x10 ;用戶模式 19 FIQMODE EQU 0x11 ;快速中斷模式 20 IRQMODE EQU 0x12 ;中斷模式 21 SVCMODE EQU 0x13 ;監(jiān)管模式 22 ABORTMODE EQU 0x17 ;異常中斷模式 23 UNDEFMODE EQU 0x1b ;未定義模式 24 25 MODEMASK EQU 0x1f ;模式掩碼 26 NOINT EQU 0xc0 ;取消中斷 27 28 ;The location of stacks;設置6種工作模式的堆棧的起始地址 29 ;在option.inc中定義了_STACK_BASEADDRESS EQU 0x33ff8000 30 UserStack EQU (_STACK_BASEADDRESS-0x3800) ;0x33ff4800 ~ 31 SVCStack EQU (_STACK_BASEADDRESS-0x2800) ;0x33ff5800 ~ 32 UndefStack EQU (_STACK_BASEADDRESS-0x2400) ;0x33ff5c00 ~ 33 AbortStack EQU (_STACK_BASEADDRESS-0x2000) ;0x33ff6000 ~ 34 IRQStack EQU (_STACK_BASEADDRESS-0x1000) ;0x33ff7000 ~ 35 FIQStack EQU (_STACK_BASEADDRESS-0x0) ;0x33ff8000 ~
上傳時間： 2013-10-07
上傳用戶：m62383408
為提高溫度測量效率，降低系統(tǒng)的成本，擴展傳輸距離，設計出一種新型溫度采集系統(tǒng)。單片機通過控制具有單總線方式的溫度傳感器DS18B20實現對溫度的測量，同時單片機通過控制具有單總線方式300～450MHz頻率范圍內的MAX7044與MAX7033無線發(fā)射與接收芯片實現溫度數據的無線傳輸。與傳統(tǒng)溫度采集系統(tǒng)相比，該系統(tǒng)利用單總線方式連接，采用無線傳輸方式實現遠距離通信，易于系統(tǒng)的集成與擴展。實驗結果表明，該系統(tǒng)結構簡單、方便移植，能夠同時實現多達上百點溫度的測量與500m范圍的傳輸。 Abstract: To improve the temperature measurement efficiency and reduce system cost,expansion of transmission distance,a new type of temperature acquisition system is designed.Microcontroller controlled temperature sensor DS18B20which has a single-bus achieves temperature measurement,while microcontroller by controlled the MAX7044and MAX7033chip with a single-bus and having300~450MHz radiofrequency to achieve the wireless transmission of temperature data.Compared with conventional temperature acquisition system,the system uses single-bus connected,and uses wireless transmission means to achieve long-distance communications,easy-to-system integration and expansion.The experimental results show that the system is simple,convenient transplantation,and can be implemented in as many as a hundred-point temperature measure-ment and the transmission range of500meters.
標簽： 單總線 無線溫度 采集 系統(tǒng)設計
上傳時間： 2013-10-29
上傳用戶：515414293
介紹了電力操作電源與智能電池巡檢系統(tǒng)的特點，給出了一種基于超低功耗單片機MSP430 F149針對中小型變電站自動化運行的專用設備的基本設計原理及實現方法，最后給出了詳細硬件構成和軟件實現。該系統(tǒng)能滿足中小型變電站安全、可靠、自動運行的要求，并通過與上位機的串行通信實現變電站的遠程管理和控制。 Abstract: The characters of the intelligent battery data logging system of the electric operation power are introduced.The basic design principle and the implemented methods of the special equipment which only designed for the middle or small transformer substation based on MSP430F149 are prescribed. Finally, the hardware block diagram and the software flow chart are also given. The function that the system finally needs to realize can basically meet with the middle or small transformer substation’s satisfy, reliably,and automatic running.And it can also realize the transformer substation long-distance management and control by serial communicating with the host computer.
上傳時間： 2013-11-25
上傳用戶：黃華強
FeaturesThe following standard features are provided.• Choice of RTOS scheduling policy1. Pre-emptive:Always runs the highest available task. Tasks of identical priorityshare CPU time (fully pre-emptive with round robin time slicing).2. Cooperative:Context switches only occur if a task blocks, or explicitly callstaskYIELD().• Co-routines (light weight tasks that utilise very little RAM).• Message queues• Semaphores [via macros]• Trace visualisation ability (requires more RAM)• Majority of source code common to all supported development tools• Wide range of ports and examples
上傳時間： 2013-10-13
上傳用戶：13162218709
The Controller Area Network (CAN) is a serial, asynchronous, multi-master communication protocol forconnecting electronic control modules, sensors and actuators in automotive and industrial applications.With the SJA1000, Philips Semiconductors provides a stand-alone CAN controller which is more than a simpleeplacement of the PCA82C200.Attractive features are implemented for a wide range of applications, supporting system optimization, diagnosisand maintenance.
標簽： Stand-alone contro 1000 SJA
上傳時間： 2013-11-18
上傳用戶：yxgi5
文章提出了一種精簡指令集8 位單片機中, 算術邏輯單元的工作原理。在此基礎上, 對比傳統(tǒng)PIC 方案、以及在ALU 內部再次采用流水線作業(yè)的332 方案、44 方案, 并用Synopsys 綜合工具實現了它們。綜合及仿真結果表明, 根據該單片機系統(tǒng)要求, 44 方案速度最高, 比332 方案可提高43.9%, 而面積僅比最小的332 方案增加1.6%。在分析性能差異的根本原因之后, 闡明了該方案的優(yōu)越性。關鍵詞: 單片機, 精簡指令集, 算術邏輯單元, 流水線 Abstract: Work principle for ALU in an 8_bit RISC Singlechip microcomputer is described. The traditional PIC scheme, 332 Pipeline scheme and 44 Pipeline scheme are compared on the base of the principle, which are implemented using Synopsys design tools. Results from synthesis and simulation shows that 44 scheme operates the fast, which is 43.9% faster and only 1.6% larger than 332 scheme. The essential reason why the performance is so different is analyzed.Then the advantage of 44 scheme is clarified.Key words: Singlechip, Microcomputer, RISC, ALU, Pipeline
上傳時間： 2013-10-18
上傳用戶：xiaoyaa
The solution presented in this paper and in the attached source files emulates the mostimportant SSC functions by using SW routines implemented in C. The code is focused onthe SAB C513, but will fit to all C500 derivatives.Beyond the low level software drivers a test shell is delivered. This shell allows a quicktest of the software drivers by an emulator or a starter kit demo board.
上傳時間： 2013-11-24
上傳用戶：363186
In this document, the term Ô60xÕ is used to denote a 32-bit microprocessor from the PowerPC architecture family that conforms to the bus interface of the PowerPC 601ª, PowerPC 603ª, or PowerPC 604 microprocessors. Note that this does not include the PowerPC 602ª microprocessor which has a multiplexed address/data bus. 60x processors implement the PowerPC architecture as it is speciÞed for 32-bit addressing, which provides 32-bit effective (logical) addresses, integer data types of 8, 16, and 32 bits,and ßoating-point data types of 32 and 64 bits (single-precision and double-precision).1.1 Overview The MPC106 provides an integrated high-bandwidth, high-performance, TTL-compatible interface between a 60x processor, a secondary (L2) cache or additional (up to four total) 60x processors, the PCI bus,and main memory. This section provides a block diagram showing the major functional units of the 106 and describes brießy how those units interact.Figure 1 shows the major functional units within the 106. Note that this is a conceptual block diagram intended to show the basic features rather than an attempt to show how these features are physically implemented on the device.
上傳時間： 2013-10-08
上傳用戶：18711024007
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.For input signals, which do not provide the required rise/fall times, external circuitry mustbe used to shape the signal transitions.In the attached diagram, the effect of the sample rate is shown. The numbers 1 to 5 in thediagram represent possible sample points. Waveform a) shows the result if the inputsignal transition time through the undefined TTL-level area is less than the time distancebetween the sample points (sampling at 1, 2, 3, and 4). Waveform b) can be the result ifthe sampling is performed more than once within the undefined area (sampling at 1, 2, 5,3, and 4).Sample points:1. Evaluation of the signal clearly results in a low level2. Either a low or a high level can be sampled here. If low is sampled, no transition willbe detected. If the sample results in a high level, a transition is detected, and anappropriate action (e.g. capture) might take place.3. Evaluation here clearly results in a high level. If the previous sample 2) had alreadydetected a high, there is no change. If the previous sample 2) showed a low, atransition from low to high is detected now.
上傳時間： 2013-10-23
上傳用戶：copu
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-Triggers are intended to always provide proper internal low and high levels, even if anundefined voltage level (between TTL-VIL and TTL-VIH) is externally applied to the pin.The hysteresis of these inputs, however, is very small, and can not be properly used in anapplication to suppress signal noise, and to shape slow rising/falling input transitions.Thus, it must be taken care that rising/falling input signals pass the undefined area of theTTL-specification between VIL and VIH with a sufficient rise/fall time, as generally usualand specified for TTL components (e.g. 74LS series: gates 1V/us, clock inputs 20V/us).The effect of the implemented Schmitt-Trigger is that even if the input signal remains inthe undefined area, well defined low/high levels are generated internally. Note that allinput signals are evaluated at specific sample points (depending on the input and theperipheral function connected to it), at that signal transitions are detected if twoconsecutive samples show different levels. Thus, only the current level of an input signalat these sample points is relevant, that means, the necessary rise/fall times of the inputsignal is only dependant on the sample rate, that is the distance in time between twoconsecutive evaluation time points. If an input signal, for instance, is sampled throughsoftware every 10us, it is irrelevant, which input level would be seen between thesamples. Thus, it would be allowable for the signal to take 10us to pass through theundefined area. Due to the sample rate of 10us, it is assured that only one sample canoccur while the signal is within the undefined area, and no incorrect transition will bedetected. For inputs which are connected to a peripheral function, e.g. capture inputs, thesample rate is determined by the clock cycle of the peripheral unit. In the case of theCAPCOM unit this means a sample rate of 400ns @ 20MHz CPU clock. This requiresinput signals to pass through the undefined area within these 400ns in order to avoidmultiple capture events.
上傳時間： 2014-04-02
上傳用戶：han_zh
