These routines transmit and receive serial data using two general * I/O pins, in 8 bit, No parity, 1 stop bit format. They are useful * for performing serial I/O on 8051 derivatives not having an * internal UART, or for implementing a second serial channel.
標(biāo)簽： routines transmit receive general
上傳時(shí)間： 2015-05-22
上傳用戶：firstbyte
When the P89LPC90x is in programming mode all pins that are not used for programming are tri-stated. During programming mode the reset pin has a weak pull-up resistor.
標(biāo)簽： programming tri-stated are When
上傳時(shí)間： 2015-11-03
上傳用戶：集美慧
SCART接口的定義和功能介紹。Special pins on EURO_SCART
標(biāo)簽： EURO_SCART Special SCART pins
上傳時(shí)間： 2015-12-11
上傳用戶：maizezhen
富士通單片機(jī)MB902420系列 extINT Project: All external Interrupt-pins INT0 .. INT7 will be enabled. A falling edge on INTx will toggle PDR4_P4x in order to toggle the LEDx of the Flash-CAN-100P Board e.g. falling edge on INT3 will result in LED D3 will toggleP47..P40 (UserLEDs of FlashCan100P) and will send out again as byte-packages to ID#2 Receive-Buffer #1 : basic can Transmit-Buffer #6 : full-can ID #2
標(biāo)簽： Interrupt-pins external Project enabled
上傳時(shí)間： 2016-04-27
上傳用戶：waizhang
wsd:enc28j60 28 pins for ethernet design,10Mbps,enc28j60+avr chip m16 webserver source.
標(biāo)簽： enc webserver 28 ethernet
上傳時(shí)間： 2016-05-02
上傳用戶：集美慧
This software transmits data (using TCP/IP) from I/O pins (of the Tini Board - from Dallas Semiconductors) to a specific IP address.
標(biāo)簽： from Semicondu transmits software
上傳時(shí)間： 2016-05-29
上傳用戶：zhangzhenyu
Device pins that are not connected to a specific peripheral function are controlled by the GPIO registers. pins may be dynamically configured as inputs or outputs. Separate registers allow setting or clearing any number of outputs simu 中文
標(biāo)簽： controlled peripheral are connected
上傳時(shí)間： 2014-01-16
上傳用戶：lijinchuan
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
標(biāo)簽： SHIFTER name module Input
上傳時(shí)間： 2013-12-13
上傳用戶：himbly
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
標(biāo)簽： SHIFTER name module Input
上傳時(shí)間： 2014-01-20
上傳用戶：三人用菜
this is a stepper motor controller with specifications pins: for RS-232 interfacing stepper motor: 47-50 bus PUSH button: 9-15 POTEN:9-15
標(biāo)簽： stepper motor specifications interfacing
上傳時(shí)間： 2013-12-22
上傳用戶：lnnn30
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