This document describes how to switch to and program the unisersal serial bus (USB)
analog phase-locked loop (APLL) on the C5506/C5507/C5509A devices. Example
assembly programs for programming and switching to and from the APLL are also
provided in the attached zip file. It is assumed that the reader is familiar with the use
and operation of the C5506/C5507/C5509A USB digital phase-locked loop (DPLL) and
C55x™ Digital Signal Processor (DSP) IDLE procedures.
FIR Filter Design
This chapter treats the design of linear-phase FIR filters. The assignments are
divided in two parts, the first part focuses on the design of FIR filters using the
window design method while the second part focuses on design
The Window Design Method
The basic idea behind the design of linear-phase FIR filters using the window
method is to choose a proper ideal frequency-selective filter [which always has
a noncausal, infinite duration impulse response] and then truncate its impulse
response hd[n] to obtain a linear-phase and causal FIR filter h[n]. To truncate the
impulse response of the ideal filter a time window w[n] is used. Available windows
in Matlab are rectangular [or boxcar in Matlab], bartlett, hamming, hanning
