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  • 用vhdl編寫的pci源代碼。花了我2000多元錢買來的

    用vhdl編寫的pci源代碼。花了我2000多元錢買來的,編譯通過!

    標(biāo)簽: vhdl 2000 pci 編寫

    上傳時(shí)間: 2013-08-29

    上傳用戶:brilliantchen

  • 利用高速FPGA實(shí)現(xiàn)PCI總線接口的設(shè)計(jì)方案

    PCI是一種高性能的局部總線規(guī)范,可實(shí)現(xiàn)各種功能標(biāo)準(zhǔn)的PCI總線卡。本文簡要介紹了PCI總線的特點(diǎn)、信號與命令,提出了一種利用高速FPGA實(shí)現(xiàn)PCI總線接口的設(shè)計(jì)方案。\r\n

    標(biāo)簽: FPGA PCI 總線接口 設(shè)計(jì)方案

    上傳時(shí)間: 2013-08-30

    上傳用戶:brain kung

  • 基于FPGA的PCI總線接口的設(shè)計(jì)方案

    基于FPGA的PCI總線接口的設(shè)計(jì)方案\r\n~!

    標(biāo)簽: FPGA PCI 總線接口 設(shè)計(jì)方案

    上傳時(shí)間: 2013-09-01

    上傳用戶:heart520beat

  • PCI ExpressTM Architecture

    PCI ExpressTM Architecture Add-in Card Compliance Checklist for the PCI Express Base 1.0a SpecificationThe PCI Special Interest Group disclaims all warranties and liability for the use of this document and the information contained herein and assumes no responsibility for any errors that may appear in this document, nor does the PCI Special Interest Group make a commitment to update the information contained herein.Contact the PCI Special Interest Group office to obtain the latest revision of this checklistQuestions regarding the ths document or membership in the PCI Special Interest Group may be forwarded tPCI Special Interest Group5440 SW Westgate Drive #217Portland, OR 97221Phone: 503-291-2569Fax: 503-297-1090 DISCLAIMERThis document is provided "as is" with no warranties whatsoever, including any warranty of merchantability, noninfringement, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification, or sample.  The PCI SIG disclaims all liability for infringement of proprietary rights, relating to use of information in this specification.  No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted herein.

    標(biāo)簽: Architecture ExpressTM PCI

    上傳時(shí)間: 2013-11-03

    上傳用戶:gy592333

  • pci e PCB設(shè)計(jì)規(guī)范

    This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two main sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.  

    標(biāo)簽: pci PCB 設(shè)計(jì)規(guī)范

    上傳時(shí)間: 2013-10-15

    上傳用戶:busterman

  • PCI Express電源解決方案

      PCI ExpressTM is the third generation of PCI (PeripheralComponent Interconnect) technology used to connect I/Operhipheral devices in computer systems. It is intended asa general purpose I/O device interconnect that meets theneeds of a wide variety of computing platforms such asdesktop, mobile, server and communications. It alsospecifies the electrical and mechanical attributes of thebackplane, connectors and removable cards in thesesystems.

    標(biāo)簽: Express PCI 電源解決方案

    上傳時(shí)間: 2013-11-17

    上傳用戶:squershop

  • 基于PCI總線的STM32運(yùn)動控制卡的設(shè)計(jì)

    在深入分析了意法半導(dǎo)體公司推出的STM32、高速PCI總線以及運(yùn)動控制卡的功能和結(jié)構(gòu)特點(diǎn)的基礎(chǔ)上,設(shè)計(jì)了一款可直接插在PCI 插槽中的伺服運(yùn)動控制卡。不僅可大大降低了成本,更為開放式數(shù)控系統(tǒng)的研究提供了一個(gè)全新的思路。結(jié)果表明,本文所設(shè)計(jì)的伺服控制卡滿足了目前控制系統(tǒng)的性能和要求。

    標(biāo)簽: PCI STM 32 總線

    上傳時(shí)間: 2014-12-25

    上傳用戶:l銀幕海

  • 基于PCI9052的PCI局部總線應(yīng)用

    詳細(xì)介紹了PCI9052接口器件的功能、結(jié)構(gòu)和使用方法,并結(jié)合實(shí)際給出了基于PCI9052器件開發(fā)PCI總線接口卡的應(yīng)用實(shí)例。 Abstract:   The main functions,structures and usage of PCI9052inferface chip are introduced in detail in this paper.And an application example of designing PCI bus interface card based on PCI9052is proposed in this paper.

    標(biāo)簽: PCI 9052 局部 總線

    上傳時(shí)間: 2013-10-16

    上傳用戶:togetsomething

  • 應(yīng)用PCI 9656的數(shù)據(jù)接收卡設(shè)計(jì)

    PCI 9656是PLX公司設(shè)計(jì)的一款高速PCI I/O芯片,可應(yīng)用于66MHz、64bit PCI和CompactPCI總線。文章簡述了PCI 9656的主要功能,介紹了一種應(yīng)用PCI 9656的CompactPCI數(shù)據(jù)接收卡設(shè)計(jì)。設(shè)計(jì)中采用MAXII系列CPLD建立了PCI 9656與FIFO間的數(shù)據(jù)通道,可滿足高速數(shù)據(jù)傳輸?shù)囊蟆?/p>

    標(biāo)簽: 9656 PCI 數(shù)據(jù)接收

    上傳時(shí)間: 2014-11-28

    上傳用戶:1184599859

  • PCI9052在PCI適配卡設(shè)計(jì)中研究與應(yīng)用

    PCI總線是Pentium主機(jī)最常見的總線,基于PCI總線形成的CompactPCI和PXI總線廣泛地應(yīng)用在儀器和自動化領(lǐng)域。PCI適配卡的接口設(shè)計(jì)變得越來越重要。本文對PCI專用接口電路PCI9052的功能進(jìn)行了研究與分析,并給出了一個(gè)應(yīng)用實(shí)例設(shè)計(jì)。

    標(biāo)簽: PCI 9052 適配卡

    上傳時(shí)間: 2013-11-02

    上傳用戶:unmwq

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