With the Altera Nios II embedded processor, you as the system designercan accelerate time-critical software algorithms by adding custominstructions to the Nios II processor instruction set. Using custominstructions, you can reduce a complex sequence of standard instructionsto a single instruction implemented in hardware. You can use this featurefor a variety of applications, for example, to optimize software innerloops for digital signal processing (DSP), packet header processing, andcomputation-intensive applications. The Nios II configuration wizard,part of the Quartus® II software’s SOPC Builder, provides a graphicaluser interface (GUI) used to add up to 256 custom instructions to theNios II processor
上傳時(shí)間： 2013-11-07
上傳用戶(hù)：swing
The LPC2292/2294 microcontrollers are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, together with 256 kB of embedded high-speed flash memory. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical code size applications, the alternative 16-bit Thumb mode reduces code by more than 30 pct with minimal performance penalty. With their 144-pin package, low power consumption, various 32-bit timers, 8-channel 10-bit ADC, 2/4 (LPC2294) advanced CAN channels, PWM channels and up to nine external interrupt pins these microcontrollers are particularly suitable for automotive and industrial control applications as well as medical systems and fault-tolerant maintenance buses. The number of available fast GPIOs ranges from 76 (with external memory) through 112 (single-chip). With a wide range of additional serial communications interfaces, they are also suited for communication gateways and protocol converters as well as many other general-purpose applications. Remark: Throughout the data sheet, the term LPC2292/2294 will apply to devices with and without the /00 or /01 suffix. The suffixes /00 and /01 will be used to differentiate from other devices only when necessary.
標(biāo)簽： lpc datasheet 2292 2294
上傳時(shí)間： 2014-12-30
上傳用戶(hù)：aysyzxzm
Abstract: High-speed and low-speed data converters serve critical functions in modern broadband mobile radios. This application note outlines how todetermine high-speed data converter performance requirements in baseband sampling radio architectures. Also, system partition strategies andadvantages are outlined when considering a high-speed analog front-end (AFE) solution.
標(biāo)簽： AFE 移動(dòng) 無(wú)線(xiàn)終端 導(dǎo)航
上傳時(shí)間： 2013-11-02
上傳用戶(hù)：jjj0202
Abstract: This application note helps system designers choose the correct external components for use with the MAX16948 dualremote antenna LDO/switch, thus ensuring that automobile-regulated phantom antenna supply and output-current-monitoring circuitrymeet performance objectives. An electronic calculator is provided that helps specify the critical external components for theMAX16948, thus reducing design time. The calculator also determines the device's analog output voltage, output current-limitthreshold, and output current-sensing accuracies. The calculator includes new automatic Step By Step feature that assists designerswith component choice. To use the new automatic feature, click on the Step By Step button relative to the desired section.
標(biāo)簽： 16948 MAX LDO 遙控天線(xiàn)
上傳時(shí)間： 2013-11-04
上傳用戶(hù)：lhll918
Nios II定制指令用戶(hù)指南：With the Altera Nios II embedded processor, you as the system designer can accelerate time-critical software algorithms by adding custom instructions to the Nios II processor instruction set. Using custom instructions, you can reduce a complex sequence of standard instructions to a single instruction implemented in hardware. You can use this feature for a variety of applications, for example, to optimize software inner loops for digital signal processing (DSP), packet header processing, and computation-intensive applications. The Nios II configuration wizard,part of the Quartus® II software’s SOPC Builder, provides a graphical user interface (GUI) used to add up to 256 custom instructions to the Nios II processor. The custom instruction logic connects directly to the Nios II arithmetic logic unit (ALU) as shown in Figure 1–1.
上傳時(shí)間： 2013-10-12
上傳用戶(hù)：kang1923
Field Programmable Gate Arrays (FPGAs) are becoming a critical part of every system design. Many vendors offer many different architectures and processes. Which one is right for your design? How do you design one of these so that it works correctly and functions as you expect in your entire system? These are the questions that this paper sets out to answer.
上傳時(shí)間： 2013-10-22
上傳用戶(hù)：lmq0059
Student result management system Use the C language realization system 2, the data structure making use of the structure body several realization student s result design 3, the system have increment, search, insert, row preface etc. basic function 4, the each function mold piece request of system use the form of function realization 5, completion design mission combine write a course a design report. 6, student the existence document of the result information in
標(biāo)簽： system realization management structure
上傳時(shí)間： 2013-11-29
上傳用戶(hù)：1966640071
英文論文78頁(yè)，Dynamic Storage Allocation -A Survey and Critical Review by PaulR.Wilson at CS Dept.德州奧斯丁 講動(dòng)態(tài)存儲(chǔ)分配，個(gè)人感覺(jué)不錯(cuò)
上傳時(shí)間： 2015-11-10
上傳用戶(hù)：z1191176801
The need for accurate monitoring and analysis of sequential data arises in many scientic, industrial and nancial problems. Although the Kalman lter is effective in the linear-Gaussian case, new methods of dealing with sequential data are required with non-standard models. Recently, there has been renewed interest in simulation-based techniques. The basic idea behind these techniques is that the current state of knowledge is encapsulated in a representative sample from the appropriate posterior distribution. As time goes on, the sample evolves and adapts recursively in accordance with newly acquired data. We give a critical review of recent developments, by reference to oil well monitoring, ion channel monitoring and tracking problems, and propose some alternative algorithms that avoid the weaknesses of the current methods.
標(biāo)簽： monitoring sequential industria accurate
上傳時(shí)間： 2013-12-17
上傳用戶(hù)：familiarsmile
μC/OS-II已經(jīng)在世界范圍內(nèi)得到廣泛使用，包括諸多領(lǐng)域，如手機(jī)、路由器、集線(xiàn)器、不間斷電源、飛行器、醫(yī)療設(shè)備及工業(yè)控制等。實(shí)際上，μC/OS-II已經(jīng)通過(guò)了非常嚴(yán)格的測(cè)試，并且得到了美國(guó)航空管理局(Federal Aviation Administration)的認(rèn)證，可以用在飛行器上。這說(shuō)明μC/OS-II是穩(wěn)定可靠的，可用于與人性命攸關(guān)的安全緊要(safety critical)系統(tǒng)；當(dāng)然，也可用于非安全緊要系統(tǒng)。
標(biāo)簽： OS-II
上傳時(shí)間： 2014-01-06
上傳用戶(hù)：himbly
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