Documentation for VxVorks 5.5. OS Libraries API Reference, Driver API Reference, BSP Developers Guide, Network Programmers Guide, Architecture Supplement for 68K, ARM, Coldfire, Hitachi, Xscale, MIPS, Pentium and PowerPC, Programmers Guide and more.
Introduction
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The ARM Cortex -A8 microprocessor is the first applications microprocessor in ARM!ˉs
new Cortex family. With high performance and power efficiency, it targets a wide
variety of mobile and consumer applications including mobile phones, set-top boxes,
gaming consoles and automotive navigation/entertainment systems. The Cortex-A8
processor spans a range of performance points depending on the implementation,
delivering over to 2000 Dhrystone MIPS (DMIPS) of performance for demanding
consumer applications and consuming less than 300mW for low-power mobile devices.
This translates into a large increase in processing capability while staying with the
power levels of previous generations of mobile devices. Consumer applications will
benefit from the reduced heat dissipation and resulting lower packaging and integration
costs.
大名鼎鼎的嵌入式操作系統vxworks的完整的源代碼，支持多種體系結構的嵌入式處理器，如arm,x86,i960,mc68k,mips,ppc,sparc等，包含完整的實時多任務處理及網絡tcpip,dhcp,rip等協議，tffs文件系統，以及各種硬件驅動程序如usb--All the source code of Famous vxwork Embedded operating system , it supports the Embedded processor of many kinds of systems architecture, such as arm,x86,I9600,mc68k,Mips,ppc,sparc etc， it includes entire Real-Time & multi_tasks processing and some network protocols of tcpip,dhcp,rip， tfffs file system，and various kinds of hardware drivers (eg usb) etc
The 4.0 kbit/s speech codec described in this paper is based on a
Frequency Domain Interpolative (FDI) coding technique, which
belongs to the class of prototype waveform Interpolation (PWI)
coding techniques. The codec also has an integrated voice
activity detector (VAD) and a noise reduction capability. The
input signal is subjected to LPC analysis and the prediction
residual is separated into a slowly evolving waveform (SEW) and
a rapidly evolving waveform (REW) components. The SEW
magnitude component is quantized using a hierarchical
predictive vector quantization approach. The REW magnitude is
quantized using a gain and a sub-band based shape. SEW and
REW phases are derived at the decoder using a phase model,
based on a transmitted measure of voice periodicity. The spectral
(LSP) parameters are quantized using a combination of scalar
and vector quantizers. The 4.0 kbits/s coder has an algorithmic
delay of 60 ms and an estimated floating point complexity of
21.5 MIPS. The performance of this coder has been evaluated
using in-house MOS tests under various conditions such as
background noise. channel errors, self-tandem. and DTX mode
of operation, and has been shown to be statistically equivalent to
ITU-T (3.729 8 kbps codec across all conditions tested.
