<label id="uersc"><table id="uersc"></table></label> 如文件名，在LPC2138上的I2C的Master發(fā)送接受測試程序。里面的readme.txt（英）有詳細(xì)說明。
標(biāo)簽：
上傳時(shí)間： 2015-12-01
上傳用戶：eclipse
Avalon Interface Specification,The Avalon interface specification is designed to accommodate peripheral development for the system-on-a-programmable-chip (SOPC) environment. The specification provides peripheral designers with a basis for describing the address-based read/write interface found on master and slave peripherals, such as microprocessors, memory, UART, timer, etc.
標(biāo)簽： Avalon Specification specification accommodate
上傳時(shí)間： 2014-03-06
上傳用戶：pompey
An AHB system is made of masters slaves and interconnections. A general approach to include all possible "muxed" implementation of multi layered AHB systems and arbitrated AHB ones can be thought as an acyclic graph where every source node is a master, every destination node is a slave and every internal node is an arbiter there must be one and only one arc exiting a master and one or more entering a slave (single slave verus multi-slave or arbitrated slave) an arbiter can have as many input and output connections as needed. A bridge is a special node that collapses one or more slave nodes and a master node in a new "complex" node.
標(biāo)簽： interconnections approach general include
上傳時(shí)間： 2015-12-12
上傳用戶：lyy1234
一般使用PC Based Controller 都是當(dāng)作現(xiàn)場設(shè)備的一種，也就是要接受 主系統(tǒng)的命令，做一些操作控制。以Modbus 來看屬于Slave 的角色，隨 時(shí)等待接收Modbus Master 的Query Message，然后依據(jù)內(nèi)容做控制，最后 將控制結(jié)果以Response Message 回傳。本章將以ICP 7524 及ICP 7188E5 等 兩種設(shè)備分別設(shè)計(jì)Modbus RTU、ASCII 及Modbus/TCP 的Slave 應(yīng)用程序， 讀者可以將此兩種程序的架構(gòu)再延伸設(shè)計(jì)至各種實(shí)際應(yīng)用程序。
標(biāo)簽： Controller Based 現(xiàn)場設(shè)備
上傳時(shí)間： 2015-12-16
上傳用戶：nanxia
畢業(yè)課題部分程序： CY7C68013 Bulk IN 68013工作在AUTO IN模式，16位總線 SLAVE FIFO.MASTER是 ADI BF533。
標(biāo)簽： 68013 C68013 Bulk AUTO
上傳時(shí)間： 2013-12-22
上傳用戶：aig85
This program accesses a SPI EEPROM using polled mode access. The F12x MCU is configured in 4-wire Single Master Mode, and the EEPROM is the only slave device connected to the SPI bus. The read/write operations are tailored to access a Microchip 4 kB EEPROM
標(biāo)簽： configured accesses program EEPROM
上傳時(shí)間： 2016-03-29
上傳用戶：gut1234567
藍(lán)牙協(xié)議1.2版，pdf格式，共四卷 1、Master Table of Contents &Compliance Requirements 2、Architecture & Terminology Overview 3、Core System Package 4、Core System Package
標(biāo)簽： 1.2 藍(lán)牙協(xié)議
上傳時(shí)間： 2013-12-16
上傳用戶：15071087253
// This program accesses a SPI EEPROM using polled mode access. The F06x MCU // is configured in 4-wire Single Master Mode, and the EEPROM is the only // slave device connected to the SPI bus. The read/write operations are // tailored to access a Microchip 4 kB EEPROM 25LC320. The relevant hardware // connections of the F06x MCU are shown here:
標(biāo)簽： configured accesses program EEPROM
上傳時(shí)間： 2014-01-18
上傳用戶：liglechongchong
// This program accesses a SPI EEPROM using polled mode access. The F06x MCU // is configured in 4-wire Single Master Mode, and the EEPROM is the only // slave device connected to the SPI bus. The read/write operations are // tailored to access a Microchip 4 kB EEPROM 25LC320. The relevant hardware // connections of the F06x MCU are shown here:
標(biāo)簽： configured accesses program EEPROM
上傳時(shí)間： 2016-04-12
上傳用戶：qb1993225
This example demonstrates how the C8051F06x SMBus interface can communicate // with a 256 byte I2C Serial EEPROM (Microchip 24LC02B). // - Interrupt-driven SMBus implementation // - Only master states defined (no slave or arbitration) // - Timer4 used by SMBus for SCL low timeout detection // - SCL frequency defined by <SMB_FREQUENCY> constant
標(biāo)簽： demonstrates communicate C8051F06x interface
上傳時(shí)間： 2016-04-12
上傳用戶：hanli8870
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