jsf做的增刪改的例子，比較短小，代碼不多，但展現了做master-detail時的思路，可以參考
標簽： jsf
上傳時間： 2013-12-18
上傳用戶：yepeng139
pyformat.zip包中有兩個文件夾，pyformat_src文件夾里的為源代碼，pyformat_dist文件夾里的為編譯后的exe可執行程序，另外每個文件夾里都放了一個名為“testfile.txt”的測試文件。 源碼使用方法示例：執行"python pyformat.py testfile.txt"。 可執行程序使用方法示例：執行“pyformat testfile.txt”。 即可把文件名中的不帶調拼音+聲調記號轉化為帶調拼音輸出到stdout。文件名可以有多個。 例如：輸入wo3 shi4 zhong1 guo2 ren2. 輸出為wǒ shì zhōng guó rén. zho1ng、zhon1g、zhong1、zhong12341等均輸出為zhōng。
上傳時間： 2015-11-26
上傳用戶：1427796291
VHDL實現SPI功能源代碼 -- The SPI bus is a 3 wire bus that in effect links a serial shift -- register between the "master" and the "slave". Typically both the -- master and slave have an 8 bit shift register so the combined -- register is 16 bits. When an SPI transfer takes place, the master and -- slave shift their shift registers 8 bits and thus exchange their 8 -- bit register values.
上傳時間： 2013-12-23
上傳用戶：lx9076
如文件名，在LPC2138上的I2C的Master發送接受測試程序。里面的readme.txt（英）有詳細說明。
標簽：
上傳時間： 2015-12-01
上傳用戶：eclipse
This document contains a general overview in the first few sections as well as a more detailed reference in later sections for SVMpython. If you re already familiar with SVMpython, it s possible to get a pretty good idea of how to use the package merely by browsing through svmstruct.py and multiclass.py. This document provides a more in depth view of how to use the package. Note that this is not a conversion of SVMstruct to Python. It is merely an embedding of Python in existing C code. All code other than the user implemented API functions is still in C, including optimization.
標簽： document contains detailed overview
上傳時間： 2013-12-14
上傳用戶：希醬大魔王
Avalon Interface Specification,The Avalon interface specification is designed to accommodate peripheral development for the system-on-a-programmable-chip (SOPC) environment. The specification provides peripheral designers with a basis for describing the address-based read/write interface found on master and slave peripherals, such as microprocessors, memory, UART, timer, etc.
標簽： Avalon Specification specification accommodate
上傳時間： 2014-03-06
上傳用戶：pompey
An AHB system is made of masters slaves and interconnections. A general approach to include all possible "muxed" implementation of multi layered AHB systems and arbitrated AHB ones can be thought as an acyclic graph where every source node is a master, every destination node is a slave and every internal node is an arbiter there must be one and only one arc exiting a master and one or more entering a slave (single slave verus multi-slave or arbitrated slave) an arbiter can have as many input and output connections as needed. A bridge is a special node that collapses one or more slave nodes and a master node in a new "complex" node.
標簽： interconnections approach general include
上傳時間： 2015-12-12
上傳用戶：lyy1234
一般使用PC Based Controller 都是當作現場設備的一種，也就是要接受 主系統的命令，做一些操作控制。以Modbus 來看屬于Slave 的角色，隨 時等待接收Modbus Master 的Query Message，然后依據內容做控制，最后 將控制結果以Response Message 回傳。本章將以ICP 7524 及ICP 7188E5 等 兩種設備分別設計Modbus RTU、ASCII 及Modbus/TCP 的Slave 應用程序， 讀者可以將此兩種程序的架構再延伸設計至各種實際應用程序。
標簽： Controller Based 現場設備
上傳時間： 2015-12-16
上傳用戶：nanxia
畢業課題部分程序： CY7C68013 Bulk IN 68013工作在AUTO IN模式，16位總線 SLAVE FIFO.MASTER是 ADI BF533。
上傳時間： 2013-12-22
上傳用戶：aig85
This program accesses a SPI EEPROM using polled mode access. The F12x MCU is configured in 4-wire Single Master Mode, and the EEPROM is the only slave device connected to the SPI bus. The read/write operations are tailored to access a Microchip 4 kB EEPROM
標簽： configured accesses program EEPROM
上傳時間： 2016-03-29
上傳用戶：gut1234567
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