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logic-based

  • 用fpga實現的DA轉換器

    用fpga實現的DA轉換器,有說明和源碼,VDHL文件。\\r\\nA PLD Based Delta-Sigma DAC\\r\\nDelta-Sigma modulation is the simple, yet powerful,\\r\\ntechnique responsible for the extraordinary\\r\\nperformance and low cost of today s audio CD\\r\\nplayers. The simplest Delta-Sigm

    標簽: fpga DA轉換器

    上傳時間: 2013-08-22

    上傳用戶:dudu1210004

  • 關于FPGA流水線設計的論文

    關于FPGA流水線設計的論文\r\nThis work investigates the use of very deep pipelines for\r\nimplementing circuits in FPGAs, where each pipeline\r\nstage is limited to a single FPGA logic element (LE). The\r\narchitecture and VHDL design of a parameterized integer\r\na

    標簽: FPGA 流水線 論文

    上傳時間: 2013-09-03

    上傳用戶:wl9454

  • US Navy VHDL Modelling Guide

      This document was developed under the Standard Hardware and Reliability Program (SHARP) TechnologyIndependent Representation of Electronic Products (TIREP) project. It is intended for use by VHSIC HardwareDescription Language (VHDL) design engineers and is offered as guidance for the development of VHDL modelswhich are compliant with the VHDL Data Item Description (DID DI-EGDS-80811) and which can be providedto manufacturing engineering personnel for the development of production data and the subsequent productionof hardware. Most VHDL modeling performed to date has been concentrated at either the component level orat the conceptual system level. The assembly and sub-assembly levels have been largely disregarded. Under theSHARP TIREP project, an attempt has been made to help close this gap. The TIREP models are based upon lowcomplexity Standard Electronic Modules (SEM) of the format A configuration. Although these modules are quitesimple, it is felt that the lessons learned offer guidance which can readily be applied to a wide range of assemblytypes and complexities.

    標簽: Modelling Guide Navy VHDL

    上傳時間: 2014-12-23

    上傳用戶:xinhaoshan2016

  • Verilog編碼中的非阻塞性賦值

      One of the most misunderstood constructs in the Verilog language is the nonblockingassignment. Even very experienced Verilog designers do not fully understand how nonblockingassignments are scheduled in an IEEE compliant Verilog simulator and do not understand whenand why nonblocking assignments should be used. This paper details how Verilog blocking andnonblocking assignments are scheduled, gives important coding guidelines to infer correctsynthesizable logic and details coding styles to avoid Verilog simulation race conditions

    標簽: Verilog 編碼 非阻塞性賦值

    上傳時間: 2013-10-17

    上傳用戶:tb_6877751

  • 2012TI電子設計大賽——微弱信號檢測裝置

    微弱信號檢測裝置 四川理工學院 劉鵬飛、梁天德、曾學明 摘要: 本設計以TI的Launch Pad為核心板,采用鎖相放大技術設計并制作了一套微弱信號檢測裝置,用以檢測在強噪聲背景下已知頻率微弱正弦波信號的幅度值,并在液晶屏上數字顯示出所測信號相應的幅度值。實驗結果顯示其抗干擾能力強,測量精度高。 關鍵詞:強噪聲;微弱信號;鎖相放大;Launch Pad Abstract: This design is based on the Launch Pad of TI core board, using a lock-in amplifier technique designed and produced a weak signal detection device, to measure the known frequency sine wave signal amplitude values of the weak in the high noise background, and shows the measured signal amplitude of the corresponding value in the liquid crystal screen. Test results showed that it has high accuracy and strong anti-jamming capability. Keywords: weak signal detection; lock-in-amplifier; Launch Pad  1、引言 隨著現代科學技術的發展,在科研與生產過程中人們越來越需要從復雜高強度的噪聲中檢測出有用的微弱信號,因此對微弱信號的檢測成為當前科研的熱點。微弱信號并不意味著信號幅度小,而是指被噪聲淹沒的信號,“微弱”也僅是相對于噪聲而言的。只有在有效抑制噪聲的條件下有選擇的放大微弱信號的幅度,才能提取出有用信號。微弱信號檢測技術的應用相當廣泛,在生物醫學、光學、電學、材料科學等相關領域顯得愈發重要。 2、方案論證 針對微弱信號的檢測的方法有很多,比如濾波法、取樣積分器、鎖相放大器等。下面就針對這幾種方法做一簡要說明。 方案一:濾波法。 在大部分的檢測儀器中都要用到濾波方法對模擬信號進行一定的處理,例如隔離直流分量,改善信號波形,防止離散化時的波形混疊,克服噪聲的不利影響,提高信噪比等。常用的噪聲濾波器有:帶通、帶阻、高通、低通等。但是濾波方法檢測信號不能用于信號頻譜與噪聲頻譜重疊的情況,有其局限性。雖然可以對濾波器的通頻帶進行調節,但其噪聲抑制能力有限,同時其準確性與穩定性將大打折扣。

    標簽: 2012 TI 電子設計大賽 微弱信號

    上傳時間: 2013-11-04

    上傳用戶:lty6899826

  • MAX17600數據資料

     The MAX17600–MAX17605 devices are high-speedMOSFET drivers capable of sinking /sourcing 4A peakcurrents. The devices have various inverting and noninvertingpart options that provide greater flexibility incontrolling the MOSFET. The devices have internal logiccircuitry that prevents shoot-through during output-statchanges. The logic inputs are protected against voltagespikes up to +14V, regardless of VDD voltage. Propagationdelay time is minimized and matched between the dualchannels. The devices have very fast switching time,combined with short propagation delays (12ns typ),making them ideal for high-frequency circuits. Thedevices operate from a +4V to +14V single powersupply and typically consume 1mA of supply current.The MAX17600/MAX17601 have standard TTLinput logic levels, while the MAX17603 /MAX17604/MAX17605 have CMOS-like high-noise margin (HNM)input logic levels. The MAX17600/MAX17603 are dualinverting input drivers, the MAX17601/MAX17604 aredual noninverting input drivers, and the MAX17602 /MAX17605 devices have one noninverting and oneinverting input. These devices are provided with enablepins (ENA, ENB) for better control of driver operation.

    標簽: 17600 MAX 數據資料

    上傳時間: 2013-12-20

    上傳用戶:zhangxin

  • MAX4968,MAX4968A數據手冊

    The MAX4968/MAX4968A are 16-channel, high-linearity,high-voltage, bidirectional SPST analog switches with18I (typ) on-resistance. The devices are ideal for use inapplications requiring high-voltage switching controlledby a low-voltage control signal, such as ultrasound imagingand printers. The MAX4968A provides integrated40kI (typ) bleed resistors on each switch terminal todischarge capacitive loads. Using HVCMOS technology,these switches combine high-voltage bilateral MOSswitches and low-power CMOS logic to provide efficientcontrol of high-voltage analog signals.

    標簽: 4968 MAX 數據手冊

    上傳時間: 2013-10-09

    上傳用戶:yepeng139

  • ISM射頻產品的晶體頻率計算

    Abstract: Many industrial/scientific/medical (ISM) band radio frequency (RF) products use crystal oscillators to generate areference for the phase-locked loop (PLL)-based local oscillator (LO). This tutorial provides a basic description of theISM-RF Crystal Calculator, which can be used to calculate various impacts on crystal frequency accuracy and startupmargin for such an LO.  

    標簽: ISM 射頻 晶體頻率 計算

    上傳時間: 2013-11-15

    上傳用戶:JasonC

  • COOLMOS全面認識

    Recently a new technology for high voltage Power MOSFETshas been introduced – the CoolMOS™ . Based on thenew device concept of charge compensation the RDS(on) areaproduct for e.g. 600V transistors has been reduced by afactor of 5. The devices show no bipolar current contributionlike the well known tail current observed during the turn-offphase of IGBTs. CoolMOS™ virtually combines the lowswitching losses of a MOSFET with the on-state losses of anIGBT.

    標簽: COOLMOS

    上傳時間: 2013-11-14

    上傳用戶:zhyiroy

  • 信號鏈和PLC是如何影響我們的生活

    Abstract: It is incredible how many programmable logic controls (PLCs) around us make our modern life possible and pleasant.Machines in our homes heat and cool our air and water, as well as preserve and cook our food. This tutorial explains the importanceof PLCs, and describes how to choose component parts using the parametric tools on the Maxim's website.A similar version of this article was published February 29, 2012 in John Day's Automotive Electronic News.

    標簽: PLC 信號鏈

    上傳時間: 2013-11-10

    上傳用戶:liaocs77

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