The PCA9540B is a 1-of-2 bidirectional translating multiplexer, controlled via the I2C-bus.The SCL/SDA upstream pair fans out to two SCx/SDx downstream pairs, or channels.Only one SCx/SDx channel is selected at a time, determined by the contents of theprogrammable control register.
上傳時間： 2014-12-28
上傳用戶：nshark
The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual masterI2C-bus applications where system operation is required, even when one master fails orthe controller card is removed for maintenance. The two masters (for example, primaryand back-up) are located on separate I2C-buses that connect to the same downstreamI2C-bus slave devices. I2C-bus commands are sent by either I2C-bus master and are usedto select one master at a time. Either master at any time can gain control of the slavedevices if the other master is disabled or removed from the system. The failed master isisolated from the system and will not affect communication between the on-line masterand the slave devices on the downstream I2C-bus.
上傳時間： 2013-10-09
上傳用戶：3294322651
PCA9519 是一個4 通道的I2C 總線/SMBus 中繼器，可以實現將低電壓兩線串行總線接口的處理器與標準的I2C 總線或SMBus I/O 相連。該中繼器在電平轉換中保持I2C 總線系統所有的模式和特點的同時，允許通過給數據總線（SDA）和時鐘總線（SCK）提供雙向緩沖區來擴展I2C 總線，從而使I2C 總線或SMBus 在高電壓下最大容限電容為400PF。SDA 和SCL 引腳具有耐壓保護功能，當PCA9519 掉電時，均呈現出高阻抗特性。
上傳時間： 2013-11-23
上傳用戶：brilliantchen
The PCA9542A is a 1-of-2 bidirectional translating multiplexer, controlled via the I2C-bus.The SCL/SDA upstream pair fans out to two SCx/SDx downstream pairs, or channels.Only one SCx/SDx channel is selected at a time, determined by the contents of theprogrammable control register. Two interrupt inputs, INT0 and INT1, one for each of theSCx/SDx downstream pairs, are provided. One interrupt output, INT, which acts as anAND of the two interrupt inputs, is provided.
上傳時間： 2013-12-07
上傳用戶：europa_lin
PCA9544A 是NXP 公司生產的I2C 總線多路復用器，通過該器件可以將一路I2C 總線擴展為4 路I2C 總線。將1 路上行SDA/SCL 通道擴展為4 路下行通道。通過對內部可編程寄存器進行配置，在同一時間可以任意選擇一對SCx/SDx 線。器件擁有四路輸入中斷，INT0到INT3，分別對應著四路下行通道。該器件還有一個輸出中斷，輸出中斷的狀態由四個輸入中斷通過“與”邏輯控制。
上傳時間： 2013-11-17
上傳用戶：woshinimiaoye
PCA9545A/45B/45C 是一款I2C 總線擴展器件，通過它可以將一路I2C 總線擴展為四路，在對內部控制寄存器進行相應配置后，可同時選擇一路或者多路下行I2C 總線與上行I2C 總線相連。該器件具有四個中斷輸入INT0 - INT3 和一個中斷輸出INT ，分別對應四路下行I2C總線和一路上行I2C 總線，四個中斷輸入相“與”后控制中斷輸出INT 狀態。
上傳時間： 2014-01-25
上傳用戶：ainimao
The PCA9546A is a quad bidirectional translating switch controlled via the I2C-bus. TheSCL/SDA upstream pair fans out to four downstream pairs, or channels. Any individualSCx/SDx channel or combination of channels can be selected, determined by thecontents of the programmable control register.
上傳時間： 2013-11-16
上傳用戶：cc1915
The PCA9555 is a 24-pin CMOS device that provides 16 bits of General Purpose parallelInput/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed toenhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvementsinclude higher drive capability, 5 V I/O tolerance, lower supply current, individual I/Oconfiguration, and smaller packaging. I/O expanders provide a simple solution whenadditional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.The PCA9555 consists of two 8-bit Configuration (Input or Output selection); Input, Outputand Polarity Inversion (active HIGH or active LOW operation) registers. The systemmaster can enable the I/Os as either inputs or outputs by writing to the I/O configurationbits. The data for each Input or Output is kept in the corresponding Input or Outputregister. The polarity of the read register can be inverted with the Polarity Inversionregister. All registers can be read by the system master. Although pin-to-pin and I2C-busaddress compatible with the PCF8575, software changes are required due to theenhancements, and are discussed in Application Note AN469.
上傳時間： 2013-11-13
上傳用戶：fredguo
PCA9546A 是一款I2C 多路復用器和開關，能實現I2C 總線擴展、電平轉換及總線功能恢復
上傳時間： 2013-12-02
上傳用戶：myworkpost
The PCA9547 is an octal bidirectional translating multiplexer controlled by the I2C-bus.The SCL/SDA upstream pair fans out to eight downstream pairs, or channels. Only oneSCx/SDx channel can be selected at a time, determined by the contents of theprogrammable control register. The device powers up with Channel 0 connected, allowingimmediate communication between the master and downstream devices on that channel.
上傳時間： 2014-12-28
上傳用戶：270189020
