1. 下列說法正確的是 （ ） A. Java語言不區分大小寫 B. Java程序以類為基本單位 C. JVM為Java虛擬機JVM的英文縮寫 D. 運行Java程序需要先安裝JDK 2. 下列說法中錯誤的是 ( ) A. Java語言是編譯執行的 B. Java中使用了多進程技術 C. Java的單行注視以//開頭 D. Java語言具有很高的安全性 3. 下面不屬于Java語言特點的一項是( ) A. 安全性 B. 分布式 C. 移植性 D. 編譯執行 4. 下列語句中，正確的項是 ( ) A . int $e,a,b=10 B. char c,d=’a’ C. float e=0.0d D. double c=0.0f
上傳時間： 2017-01-04
上傳用戶：netwolf
This material is not only up-to-date, it defines up-to-date. It is truly cutting-edge. As the only book on the subject, Rootkits will be of interest to any Windows security researcher or security programmer. It s detailed, well researched and the technical information is excellent. The level of technical detail, research, and time invested in developing relevant examples is impressive.
標簽： up-to-date only cutting-edge material
上傳時間： 2017-07-09
上傳用戶：comua
The government of a small but important country has decided that the alphabet needs to be streamlined and reordered. Uppercase letters will be eliminated. They will issue a royal decree in the form of a String of B and A characters. The first character in the decree specifies whether a must come ( B )Before b in the new alphabet or ( A )After b . The second character determines the relative placement of b and c , etc. So, for example, "BAA" means that a must come Before b , b must come After c , and c must come After d . Any letters beyond these requirements are to be excluded, so if the decree specifies k comparisons then the new alphabet will contain the first k+1 lowercase letters of the current alphabet. Create a class Alphabet that contains the method choices that takes the decree as input and returns the number of possible new alphabets that conform to the decree. If more than 1,000,000,000 are possible, return -1. Definition
標簽： government streamline important alphabet
上傳時間： 2015-06-09
上傳用戶：weixiao99
We have a group of N items (represented by integers from 1 to N), and we know that there is some total order defined for these items. You may assume that no two elements will be equal (for all a, b: a<b or b<a). However, it is expensive to compare two items. Your task is to make a number of comparisons, and then output the sorted order. The cost of determining if a < b is given by the bth integer of element a of costs (space delimited), which is the same as the ath integer of element b. Naturally, you will be judged on the total cost of the comparisons you make before outputting the sorted order. If your order is incorrect, you will receive a 0. Otherwise, your score will be opt/cost, where opt is the best cost anyone has achieved and cost is the total cost of the comparisons you make (so your score for a test case will be between 0 and 1). Your score for the problem will simply be the sum of your scores for the individual test cases.
標簽： represented integers group items
上傳時間： 2016-01-17
上傳用戶：jeffery
特點： 精確度0.1%滿刻度 可作各式數學演算式功能如:A+B/A-B/AxB/A/B/A&B(Hi or Lo)/|A|/ 16 BIT類比輸出功能 輸入與輸出絕緣耐壓2仟伏特/1分鐘(input/output/power) 寬范圍交直流兩用電源設計 尺寸小,穩定性高
上傳時間： 2014-12-23
上傳用戶：ydd3625
特點(FEATURES) 精確度0.1%滿刻度 (Accuracy 0.1%F.S.) 可作各式數學演算式功能如:A+B/A-B/AxB/A/B/A&B(Hi or Lo)/|A| (Math functioA+B/A-B/AxB/A/B/A&B(Hi&Lo)/|A|/etc.....) 16 BIT 類比輸出功能(16 bit DAC isolating analog output function) 輸入/輸出1/輸出2絕緣耐壓2仟伏特/1分鐘(Dielectric strength 2KVac/1min. (input/output1/output2/power)) 寬范圍交直流兩用電源設計(Wide input range for auxiliary power) 尺寸小,穩定性高(Dimension small and High stability)
上傳時間： 2013-11-24
上傳用戶：541657925
/*--------- 8051內核特殊功能寄存器 -------------*/ sfr ACC = 0xE0; //累加器 sfr B = 0xF0; //B 寄存器 sfr PSW = 0xD0; //程序狀態字寄存器 sbit CY = PSW^7; //進位標志位 sbit AC = PSW^6; //輔助進位標志位 sbit F0 = PSW^5; //用戶標志位0 sbit RS1 = PSW^4; //工作寄存器組選擇控制位 sbit RS0 = PSW^3; //工作寄存器組選擇控制位 sbit OV = PSW^2; //溢出標志位 sbit F1 = PSW^1; //用戶標志位1 sbit P = PSW^0; //奇偶標志位 sfr SP = 0x81; //堆棧指針寄存器 sfr DPL = 0x82; //數據指針0低字節 sfr DPH = 0x83; //數據指針0高字節 /*------------ 系統管理特殊功能寄存器 -------------*/ sfr PCON = 0x87; //電源控制寄存器 sfr AUXR = 0x8E; //輔助寄存器 sfr AUXR1 = 0xA2; //輔助寄存器1 sfr WAKE_CLKO = 0x8F; //時鐘輸出和喚醒控制寄存器 sfr CLK_DIV = 0x97; //時鐘分頻控制寄存器 sfr BUS_SPEED = 0xA1; //總線速度控制寄存器 /*----------- 中斷控制特殊功能寄存器 --------------*/ sfr IE = 0xA8; //中斷允許寄存器 sbit EA = IE^7; //總中斷允許位 sbit ELVD = IE^6; //低電壓檢測中斷控制位 8051
上傳時間： 2013-10-30
上傳用戶：yxgi5
TLC2543是TI公司的12位串行模數轉換器，使用開關電容逐次逼近技術完成A/D轉換過程。由于是串行輸入結構，能夠節省51系列單片機I/O資源；且價格適中，分辨率較高，因此在儀器儀表中有較為廣泛的應用。 TLC2543的特點 （1）12位分辯率A/D轉換器； （2）在工作溫度范圍內10μs轉換時間； （3）11個模擬輸入通道； （4）3路內置自測試方式； （5）采樣率為66kbps； （6）線性誤差±1LSBmax； （7）有轉換結束輸出EOC； （8）具有單、雙極性輸出； （9）可編程的MSB或LSB前導； （10）可編程輸出數據長度。 TLC2543的引腳排列及說明 TLC2543有兩種封裝形式：DB、DW或N封裝以及FN封裝，這兩種封裝的引腳排列如圖1，引腳說明見表1 TLC2543電路圖和程序欣賞 #include<reg52.h> #include<intrins.h> #define uchar unsigned char #define uint unsigned int sbit clock=P1^0; sbit d_in=P1^1; sbit d_out=P1^2; sbit _cs=P1^3; uchar a1,b1,c1,d1; float sum,sum1; double sum_final1; double sum_final; uchar duan[]={0x3f,0x06,0x5b,0x4f,0x66,0x6d,0x7d,0x07,0x7f,0x6f}; uchar wei[]={0xf7,0xfb,0xfd,0xfe}; void delay(unsigned char b) //50us { unsigned char a; for(;b>0;b--) for(a=22;a>0;a--); } void display(uchar a,uchar b,uchar c,uchar d) { P0=duan[a]|0x80; P2=wei[0]; delay(5); P2=0xff; P0=duan[b]; P2=wei[1]; delay(5); P2=0xff; P0=duan[c]; P2=wei[2]; delay(5); P2=0xff; P0=duan[d]; P2=wei[3]; delay(5); P2=0xff; } uint read(uchar port) { uchar i,al=0,ah=0; unsigned long ad; clock=0; _cs=0; port<<=4; for(i=0;i<4;i++) { d_in=port&0x80; clock=1; clock=0; port<<=1; } d_in=0; for(i=0;i<8;i++) { clock=1; clock=0; } _cs=1; delay(5); _cs=0; for(i=0;i<4;i++) { clock=1; ah<<=1; if(d_out)ah|=0x01; clock=0; } for(i=0;i<8;i++) { clock=1; al<<=1; if(d_out) al|=0x01; clock=0; } _cs=1; ad=(uint)ah; ad<<=8; ad|=al; return(ad); } void main() { uchar j; sum=0;sum1=0; sum_final=0; sum_final1=0; while(1) { for(j=0;j<128;j++) { sum1+=read(1); display(a1,b1,c1,d1); } sum=sum1/128; sum1=0; sum_final1=(sum/4095)*5; sum_final=sum_final1*1000; a1=(int)sum_final/1000; b1=(int)sum_final%1000/100; c1=(int)sum_final%1000%100/10; d1=(int)sum_final%10; display(a1,b1,c1,d1); } }
上傳時間： 2013-11-19
上傳用戶：shen1230
#include<iom16v.h> #include<macros.h> #define uint unsigned int #define uchar unsigned char uint a,b,c,d=0; void delay(c) { for for(a=0;a<c;a++) for(b=0;b<12;b++); }; uchar tab[]={ 0xc0,0xf9,0xa4,0xb0,0x99,0x92,0x82,0xf8,0x80,0x90,
上傳時間： 2013-10-21
上傳用戶：13788529953
摘要: 串行傳輸技術具有更高的傳輸速率和更低的設計成本, 已成為業界首選, 被廣泛應用于高速通信領域。提出了一種新的高速串行傳輸接口的設計方案, 改進了Aurora 協議數據幀格式定義的弊端, 并采用高速串行收發器Rocket I/O, 實現數據率為2.5 Gbps的高速串行傳輸。關鍵詞: 高速串行傳輸; Rocket I/O; Aurora 協議 為促使FPGA 芯片與串行傳輸技術更好地結合以滿足市場需求, Xilinx 公司適時推出了內嵌高速串行收發器RocketI/O 的Virtex II Pro 系列FPGA 和可升級的小型鏈路層協議———Aurora 協議。Rocket I/O支持從622 Mbps 至3.125 Gbps的全雙工傳輸速率, 還具有8 B/10 B 編解碼、時鐘生成及恢復等功能, 可以理想地適用于芯片之間或背板的高速串行數據傳輸。Aurora 協議是為專有上層協議或行業標準的上層協議提供透明接口的第一款串行互連協議, 可用于高速線性通路之間的點到點串行數據傳輸, 同時其可擴展的帶寬, 為系統設計人員提供了所需要的靈活性[4]。但該協議幀格式的定義存在弊端,會導致系統資源的浪費。本文提出的設計方案可以改進Aurora 協議的固有缺陷,提高系統性能, 實現數據率為2.5 Gbps 的高速串行傳輸, 具有良好的可行性和廣闊的應用前景。
上傳時間： 2013-11-06
上傳用戶：smallfish
