While faster processors, larger memory, and powerful gRAphics are fundamental requirements for workstations, users are also demanding a low-cost, solution-based approach wrapped around a standards-based technology. The Sun UltraTM 20 Workstation, which leverages the AMD OpteronTM processor with Direct Connect Architecture based on AMD64 technology, provides multiple operating system choices and leading nVidia gRAphics, delivers a platform that offers flexibility and performance in a cost-effective package with solutions to benefit customers across the board.
標(biāo)簽: requirements fundamental processors gRAphics
上傳時(shí)間: 2017-08-17
上傳用戶:zhaiye
3D gRAphics Modelling and Rendering3D計(jì)算機(jī)圖形造型與渲染
標(biāo)簽: Rendering3D Modelling gRAphics and
上傳時(shí)間: 2017-09-03
上傳用戶:ruan2570406
Behavioral models are used in games and computer gRAphics for realistic simulation of massive crowds. In this paper, we present a GPU based implementation of Reynolds [1987] algorithm for simulating flocks of birds and propose an extension to consider environment self occlusion. We performed several experiments and the results showed that the proposed approach runs up to three times faster than the original algorithm when simulating high density crowds, without compromising significantly the original crowd behavior.
標(biāo)簽: Behavioral simulation realistic computer
上傳時(shí)間: 2017-09-08
上傳用戶:hanli8870
Implementation of GPU (gRAphics Processing Unit) that rendered triangle based models. Our goal was to generate complex models with a movable camera. We wanted to be able to render complex images that consisted of hundreds to thousands of triangles. We wanted to apply interpolated shading on the objects, so that they appeared more smooth and realisitc, and to have a camera that orbitted around the object, which allowed us to look arond the object with a stationary light source. We chose to do this in hardware, because our initial implementation using running software on the NIOS II processor was too slow. Implementing parallelism in hardware is also easier to do than in software, which allows for more efficiency. We used Professor Land s floating point hardware, which allowed us to do calculations efficiency, which is essential to gRAphics.
標(biāo)簽: Implementation Processing gRAphics rendered
上傳時(shí)間: 2014-11-22
上傳用戶:shawvi
GPU Gems is a cool toolbox of advanced gRAphics techniques. Novice programmers and gRAphics gurus alike will find the Gems practical, intriguing and useful.
標(biāo)簽: gRAphics programmers techniques advanced
上傳時(shí)間: 2017-09-15
上傳用戶:xaijhqx
computer gRAphics(russian language)
標(biāo)簽: computer gRAphics language russian
上傳時(shí)間: 2013-12-12
上傳用戶:songnanhua
信息技術(shù)的不斷發(fā)展,對信息的安全提出了更高的要求.在應(yīng)用公鑰密碼體制的時(shí)候,對密鑰長度要求越來越大,處理的速度要求越來越快.而基于橢圓曲線離散對數(shù)問題的橢圓曲線密碼體制,因其每比特最大的安全性,受到了越來越廣泛的注意.橢圓曲線密碼體制(ECC:Elliptic Curve Cryptosystem)的快速實(shí)現(xiàn)也成為一個(gè)關(guān)注的方面.該文按照確定有限域、選取曲線參數(shù)、劃分結(jié)構(gòu)模塊、優(yōu)化模塊算法、實(shí)現(xiàn)模塊設(shè)計(jì),驗(yàn)證模塊功能的順序進(jìn)行書寫.為了硬件實(shí)現(xiàn)上的方便,設(shè)計(jì)選擇了含有Ⅱ型優(yōu)化正規(guī)基的伽略域GF(2191),并在該域上構(gòu)造了隨機(jī)的橢圓曲線.根據(jù)層次化、結(jié)構(gòu)化的設(shè)計(jì)思路,將橢圓曲線上的標(biāo)量乘法運(yùn)算劃分成兩個(gè)運(yùn)算層次:橢圓曲線上的運(yùn)算和有限域上的運(yùn)算.模塊劃分之后,利用自底向上的設(shè)計(jì)思路,主要針對有限域上的乘法運(yùn)算進(jìn)行了重要的改進(jìn),并對加法群中的標(biāo)量乘運(yùn)算的算法進(jìn)行了分析、證明,以達(dá)到面積優(yōu)化和快速執(zhí)行的效果.具體設(shè)計(jì)中,采用硬件描述語言Verilog HDL,在Mentor gRAphics公司出品的FPGA Advantage平臺上進(jìn)行電路設(shè)計(jì).完成了各個(gè)模塊的設(shè)計(jì)輸入和仿真.設(shè)計(jì)選用了Altera公司的APEX Ⅱ系列器件,利用第一方軟件Quartus Ⅱ 2.2進(jìn)行綜合、布局、布線和時(shí)序仿真.文中給出了橢圓曲線上的點(diǎn)加、倍點(diǎn)和標(biāo)量乘法模塊的具體設(shè)計(jì)結(jié)構(gòu)框圖.并且根據(jù)橢圓曲線的標(biāo)量乘特點(diǎn),提出了合適的驗(yàn)證方案.該設(shè)計(jì)完成了橢圓曲線上的標(biāo)量乘法運(yùn)算.設(shè)計(jì)主要針對資源受限的應(yīng)用環(huán)境:改進(jìn)了有限域上的乘法運(yùn)算、使用了沒有預(yù)處理的標(biāo)量乘算法.改進(jìn)后的橢圓曲線標(biāo)量乘法需要2,741,998個(gè)邏輯單元,在100MHz的時(shí)鐘約束下,運(yùn)行一次標(biāo)量乘法運(yùn)算需要567.69us.該次設(shè)計(jì)的結(jié)果可以直接用來構(gòu)造橢圓曲線上的簽名、驗(yàn)證、密鑰交換等算法.
標(biāo)簽: FPGA 橢圓曲線 密碼體制 乘法運(yùn)算
上傳時(shí)間: 2013-05-24
上傳用戶:zhuo0008
隨著數(shù)字電視技術(shù)的飛速發(fā)展,數(shù)字機(jī)頂盒已成為現(xiàn)在模擬電視收看數(shù)字電視節(jié)目必不可少的設(shè)備。而數(shù)字機(jī)頂盒需要在解碼后的模擬視頻信號上加入屏幕顯示信息(如亮度、色度、信息服務(wù)菜單等)以提供給觀眾良好的界面和靈活的人機(jī)交互。 v屏幕顯示系統(tǒng)(OSG,On-Screen-gRAphics)解決了現(xiàn)有模擬電視無法實(shí)現(xiàn)的疊加屏幕顯示信息的問題,提供同步輸出疊加有各種圖形、文字的電視節(jié)目圖像的功能,其中最主要的部分是OSD(On-Screen-Display),即屏幕顯示單元。OSD將疊加的位圖圖像分為多個(gè)OSD塊,一般定義為矩形區(qū)域。每個(gè)矩形區(qū)域,例如臺標(biāo)、參數(shù)調(diào)節(jié)框、字幕等,都有獨(dú)立的4色、16色或256色顏色查找表。同時(shí)OSG系統(tǒng)也支持真彩模式。OSD塊經(jīng)由編碼/混合器與視頻圖像進(jìn)行alpha混合后輸出到電視屏幕上。 本文詳細(xì)介紹了應(yīng)用FPGA設(shè)計(jì)包括屏幕顯示單元在內(nèi)的OSG系統(tǒng)的思路和設(shè)計(jì)過程,描述了模塊的劃分與功能仿真。在論文前半部分,本文給出了圖文屏幕顯示系統(tǒng)各子單元的工作流程,接著論文的后半部分,給出了詳細(xì)的模塊接口說明和硬件實(shí)現(xiàn)。
上傳時(shí)間: 2013-07-27
上傳用戶:萬有引力
Actel公司與Mentor gRAphics公司日前推出Mentor gRAphics的Precision RTL綜合工具最新版本。該版本利用Actel基于閃存的ProASIC Plus家族FPGA產(chǎn)品以提供更高的設(shè)計(jì)性能。
標(biāo)簽: Precision 2005 1100 RTL
上傳時(shí)間: 2013-07-28
上傳用戶:cc111
Mentor gRAphics HDL Designer 工具套件,為客戶帶來生產(chǎn)力更高的設(shè)計(jì)輸入、分析與管理功能,包括更強(qiáng)大的聯(lián)機(jī)資料表格,無論設(shè)計(jì)復(fù)雜性如何,都能迅速建立高品質(zhì)且結(jié)構(gòu)良好的硬件描述語言。HDL Designer Series可協(xié)助工程師迅速輸入和分析復(fù)雜的ASIC、FPGA和系統(tǒng)單芯片設(shè)計(jì),讓客戶新產(chǎn)品于更短時(shí)間內(nèi)上
標(biāo)簽: Designer 2010.2 Series HDL
上傳時(shí)間: 2013-08-05
上傳用戶:hustfanenze
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