In higher power applications to utilize the full line power and reduce line currentharmonics
標(biāo)簽： Pre-Regulator Interleaved Design Review
上傳時間： 2013-06-04
上傳用戶：lepoke
eSP268 is a USB 2.0 High-speed (HS) and Full-speed (FS) compatible PC cameracontro
標(biāo)簽： Controller Camera Bridge eSP
上傳時間： 2013-06-06
上傳用戶：ice_qi
隨著嵌入式系統(tǒng)的發(fā)展、嵌入式應(yīng)用的不斷增長以及嵌入式系統(tǒng)復(fù)雜性不斷提高，嵌入式軟件的規(guī)模和復(fù)雜性也不斷提高。在目前的嵌入式系統(tǒng)開發(fā)中間，軟件開發(fā)占80％以上的工作量，嵌入式軟件的質(zhì)量和開發(fā)周期對產(chǎn)品的最終質(zhì)量和上市時間起到?jīng)Q定性的影響。因此，為了保持產(chǎn)品競爭力，支持用戶對嵌入式設(shè)備進(jìn)行快速、高效的軟件開發(fā)，嵌入式的開發(fā)人員迫切需要更加強(qiáng)大的調(diào)試技術(shù)和手段來為開發(fā)復(fù)雜的嵌入式應(yīng)用提供幫助；同時，強(qiáng)有力的嵌入式軟件開發(fā)工具也是基本的必備條件。 本文結(jié)合ARM公司RVDS集成開發(fā)環(huán)境中調(diào)試模塊組成部分Event Viewer系統(tǒng)的開發(fā)，實現(xiàn)了對通過原始數(shù)據(jù)源采集到的CoreSight跟蹤數(shù)據(jù)的完整實時解析，并最終在顯示模塊中將其包含的信息以可視化的形式直觀地展現(xiàn)給用戶，以供后續(xù)的程序性能分析和嵌入式軟件系統(tǒng)調(diào)試。研究了與本課題相關(guān)的一些技術(shù)，包括CoreSight調(diào)試體系結(jié)構(gòu)、嵌入式常見調(diào)試技術(shù)、Eclipse平臺體系架構(gòu)及其插件擴(kuò)展點技術(shù)。在研究嵌入式集成開發(fā)環(huán)境國內(nèi)外現(xiàn)狀及其發(fā)展趨勢的基礎(chǔ)上，結(jié)合Event Viewer系統(tǒng)的整體需求，介紹了系統(tǒng)的總體設(shè)計及其功能模塊劃分，并給出了系統(tǒng)的第三方擴(kuò)展設(shè)計。討論了系統(tǒng)解析模塊的設(shè)計與實現(xiàn)。在分析CoreSight跟蹤數(shù)據(jù)解析流程的基礎(chǔ)上，對系統(tǒng)中解析模塊進(jìn)行了詳細(xì)設(shè)計，并完成了基于ITM數(shù)據(jù)流的解析實現(xiàn)。結(jié)合系統(tǒng)的功能需求和解析模塊的設(shè)計，本文利用Eclipse插件擴(kuò)展點機(jī)制，劃分解析模塊提供對外擴(kuò)展，實現(xiàn)了系統(tǒng)向第三方產(chǎn)品提供商提供擴(kuò)展接口的功能，第三方可以在此基礎(chǔ)上提供自己的解析處理。利用Eclipse View擴(kuò)展點和SWT/JFace技術(shù)，實現(xiàn)了對跟蹤數(shù)據(jù)的前臺展示，包括Text、Event、Analog三種類型；本文著重討論了Analog展示部分的詳細(xì)設(shè)計和實現(xiàn)，將解析后得到的Analog數(shù)據(jù)信息以實時曲線圖的形式展現(xiàn)給客戶，提供對Analog數(shù)據(jù)變化趨勢的直觀描述。
標(biāo)簽： ARMCoreSight 調(diào)試技術(shù)
上傳時間： 2013-04-24
上傳用戶：www240697738
Altera公司的EPLD/FPGA開發(fā)工具最新版QuartusII9.0的所有License.
標(biāo)簽： QuartusII license Altera full
上傳時間： 2013-07-09
上傳用戶：zttztt2005
使用51單片機(jī)控制T35模塊收發(fā)短信及接聽撥打電話等-51 SCM control modules using the send and receive text messages and recei
上傳時間： 2013-06-08
上傳用戶：417313137
The L298 is an integratedmonolithic circuit in a 15- lead Multiwatt and PowerSO20 packages. It is a
標(biāo)簽： FULL-BRIDGE DRIVER l298 DUAL
上傳時間： 2013-08-03
上傳用戶：wendy15
·Stanford&IBM牛人經(jīng)典之作 - Digital Control of Dynamic SystemsEditorial ReviewsProduct DescriptionThis well-respected, market-leading text discusses the use of digital computers in the real-time co
標(biāo)簽： nbsp Hardcover Digital Control
上傳時間： 2013-07-31
上傳用戶：cuiyashuo
以圖片的形式簡單，明了的講解了Proteus中的如何取消TEXT字樣。一看就明白。
標(biāo)簽：
上傳時間： 2013-09-27
上傳用戶：tiantwo
Differential Nonlinearity: Ideally, any two adjacent digitalcodes correspond to output analog voltages that are exactlyone LSB apart. Differential non-linearity is a measure of theworst case deviation from the ideal 1 LSB step. For example,a DAC with a 1.5 LSB output change for a 1 LSB digital codechange exhibits 1⁄2 LSB differential non-linearity. Differentialnon-linearity may be expressed in fractional bits or as a percentageof full scale. A differential non-linearity greater than1 LSB will lead to a non-monotonic transfer function in aDAC.Gain Error (Full Scale Error): The difference between theoutput voltage (or current) with full scale input code and theideal voltage (or current) that should exist with a full scale inputcode.Gain Temperature Coefficient (Full Scale TemperatureCoefficient): Change in gain error divided by change in temperature.Usually expressed in parts per million per degreeCelsius (ppm/°C).Integral Nonlinearity (Linearity Error): Worst case deviationfrom the line between the endpoints (zero and full scale).Can be expressed as a percentage of full scale or in fractionof an LSB.LSB (Lease-Significant Bit): In a binary coded system thisis the bit that carries the smallest value or weight. Its value isthe full scale voltage (or current) divided by 2n, where n is theresolution of the converter.Monotonicity: A monotonic function has a slope whose signdoes not change. A monotonic DAC has an output thatchanges in the same direction (or remains constant) for eachincrease in the input code. the converse is true for decreasing codes.
標(biāo)簽： Converters Defini DAC
上傳時間： 2013-10-30
上傳用戶：stvnash
ANALOG INPUT BANDWIDTH is a measure of the frequencyat which the reconstructed output fundamental drops3 dB below its low frequency value for a full scale input. Thetest is performed with fIN equal to 100 kHz plus integer multiplesof fCLK. The input frequency at which the output is −3dB relative to the low frequency input signal is the full powerbandwidth.APERTURE JITTER is the variation in aperture delay fromsample to sample. Aperture jitter shows up as input noise.APERTURE DELAY See Sampling Delay.BOTTOM OFFSET is the difference between the input voltagethat just causes the output code to transition to the firstcode and the negative reference voltage. Bottom Offset isdefined as EOB = VZT–VRB, where VZT is the first code transitioninput voltage and VRB is the lower reference voltage.Note that this is different from the normal Zero Scale Error.CONVERSION LATENCY See PIPELINE DELAY.CONVERSION TIME is the time required for a completemeasurement by an analog-to-digital converter. Since theConversion Time does not include acquisition time, multiplexerset up time, or other elements of a complete conversioncycle, the conversion time may be less than theThroughput Time.DC COMMON-MODE ERROR is a specification which appliesto ADCs with differential inputs. It is the change in theoutput code that occurs when the analog voltages on the twoinputs are changed by an equal amount. It is usually expressed in LSBs.
標(biāo)簽： Converter Defi ADC 轉(zhuǎn)換器
上傳時間： 2013-11-12
上傳用戶：pans0ul
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