The AT89C52 is a low-power, high-performance CMOS 8-bit microcomputer with 8Kbytes of Flash programmable and erasable read only memory (PEROM). The deviceis manufactured using Atmel’s high-density nonvolatile memory technology and iscompatible with the industry-standard 80C51 and 80C52 instruction set and pinout.The on-chip Flash allows the program memory to be reprogrammed in-system or by aconventional nonvolatile memory programmer. By combining a versatile 8-bit CPUwith Flash on a monolithic chip, the Atmel AT89C52 is a powerful microcomputerwhich provides a highly-flexible and cost-effective solution to many embedded controlapplications.
上傳時間： 2013-11-10
上傳用戶：1427796291
存儲器技術(shù).doc 計算機的主存儲器（Main Memory），又稱為內(nèi)部存儲器，簡稱為內(nèi)存。內(nèi)存實質(zhì)上是一組或多組具備數(shù)據(jù)輸入輸出和數(shù)據(jù)存儲功能的集成電路。內(nèi)存的主要作用是用來存放計算機系統(tǒng)執(zhí)行時所需要的數(shù)據(jù)，存放各種輸入、輸出數(shù)據(jù)和中間計算結(jié)果，以及與外部存儲器交換信息時作為緩沖用。由于CPU只能直接處理內(nèi)存中的數(shù)據(jù) ，所以內(nèi)存是計算機系統(tǒng)中不可缺少的部件。內(nèi)存的品質(zhì)直接關(guān)系到計算機系統(tǒng)的速度、穩(wěn)定性和兼容性。 4.1 存儲器類型計算機內(nèi)部存儲器有兩種類型，一種稱為只讀存儲器ROM（Read Only Memiry），另一種稱為隨機存儲器RAM（Random Access Memiry）。 4.1.1 只讀存儲器只讀存儲器ROM主要用于存放計算機固化的控制程序，如主板的BIOS程序、顯卡BIOS控制程序、硬盤控制程序等。ROM的典型特點是：一旦將數(shù)據(jù)寫入ROM中后，即使在斷電的情況下也能夠永久的保存數(shù)據(jù)。從使用上講，一般用戶能從ROM中讀取數(shù)據(jù)，而不能改寫其中的數(shù)據(jù)。但現(xiàn)在為了做一日和尚撞一天鐘于軟件或硬件程序升級，普通用戶使用所謂的閃存（Flash Memiry）也可以有條件地改變ROM中的數(shù)據(jù)。有關(guān)只讀存儲器ROM的內(nèi)容將在第11章中介紹，本章主要介紹隨機存儲器。4.1.2 隨機存取存儲器隨機存取存儲器RAM的最大特點是計算機可以隨時改變RAM中的數(shù)據(jù)，并且一旦斷電，TAM中數(shù)據(jù)就會立即丟失，也就是說，RAM中的數(shù)據(jù)在斷電后是不能保留的。從用于制造隨機存取存儲器的材料上看，RAM又可分為靜態(tài)隨機存儲器SRAM（Static RAM）和動態(tài)隨機存儲器DRAM（Dymamic RAM）兩種。1. 動態(tài)隨機存儲器在DRAM中數(shù)據(jù)是以電荷的形式存儲在電容上的，充電后電容上的電壓被認為是邏輯上的“1”，而放電后的電容上的電壓被認為是邏輯上的“0”認。為了減少存儲器的引腳數(shù)，就反存儲器芯片的每個基本單元按行、列矩陣形式連接起來，使每個存儲單元位于行、列的交叉點。這樣每個存儲單元的地址做一日和尚撞一天鐘可以用位數(shù)較少的行地址和列地址兩個部分表示，在對每個單元進行讀寫操作時，就可以采用分行、列尋址方式寫入或讀出相應(yīng)的數(shù)據(jù)，如圖4－1所示。 由于電容充電后，電容會緩慢放電，電容 上的電荷會逐漸
標簽： 存儲器
上傳時間： 2014-01-10
上傳用戶：18752787361
The standard that governs the design of avioniccomponents and systems, DO-254, is one of the mostpoorly understood but widely applicable standardsin the avionic industry. While information on thegeneral aspects of the standard is easy to obtain, thedetails of exactly how to implement the standard aresketchy. And once an entity develops a process thatachieves compliance, the details of how compliancewas achieved become part of the intellectualproperty of that entity. This white paper focuses onthe details of developing a DO-254 compliantprocess for the design of FPGAs.
上傳時間： 2013-11-12
上傳用戶：q123321
This application note covers the design considerations of a system using the performance features of the LogiCORE™ IP Advanced eXtensible Interface (AXI) Interconnect core. The design focuses on high system throughput through the AXI Interconnect core with F MAX and area optimizations in certain portions of the design. The design uses five AXI video direct memory access (VDMA) engines to simultaneously move 10 streams (five transmit video streams and five receive video streams), each in 1920 x 1080p format, 60 Hz refresh rate, and up to 32 data bits per pixel. Each VDMA is driven from a video test pattern generator (TPG) with a video timing controller (VTC) block to set up the necessary video timing signals. Data read by each AXI VDMA is sent to a common on-screen display (OSD) core capable of multiplexing or overlaying multiple video streams to a single output video stream. The output of the OSD core drives the DVI video display interface on the board. Performance monitor blocks are added to capture performance data. All 10 video streams moved by the AXI VDMA blocks are buffered through a shared DDR3 SDRAM memory and are controlled by a MicroBlaze™ processor. The reference system is targeted for the Virtex-6 XC6VLX240TFF1156-1 FPGA on the Xilinx® ML605 Rev D evaluation board
上傳時間： 2013-11-14
上傳用戶：fdmpy
This book is for students and Linux System Administrators. It provides the skills to read, write, and debug Linux shell scripts using bash shell. The book begins by describing Linux and simple scripts to automate frequently executed commands and continues by describing conditional logic, user interaction, loops, menus, traps, and functions.
上傳時間： 2014-12-30
上傳用戶：黃蛋的蛋黃
The #1 Step-by-Step Guide to labviewNow Completely Updated for labview 8! Master labview 8 with the industry's friendliest, most intuitive tutorial: labview for Everyone, Third Edition. Top labview experts Jeffrey Travis and Jim Kring teach labview the easy way: through carefully explained, step-by-step examples that give you reusable code for your own projects! This brand-new Third Edition has been fully revamped and expanded to reflect new features and techniques introduced in labview 8. You'll find two new chapters, plus dozens of new topics, including Project Explorer, AutoTool, XML, event-driven programming, error handling, regular expressions, polymorphic VIs, timed structures, advanced reporting, and much more. Certified labview Developer (CLD) candidates will find callouts linking to key objectives on NI's newest exam, making this book a more valuable study tool than ever. Not just what to d why to do it! Use labview to build your own virtual workbench Master labview's foundations: wiring, creating, editing, and debugging VIs; using controls and indicators; working with data structures; and much more Learn the "art" and best practices of effective labview development NEW: Streamline development with labview Express VIs NEW: Acquire data with NI-DAQmx and the labview DAQmx VIs NEW: Discover design patterns for error handling, control structures, state machines, queued messaging, and more NEW: Create sophisticated user interfaces with tree and tab controls, drag and drop, subpanels, and more Whatever your application, whatever your role, whether you've used labview or not, labview for Everyone, Third Edition is the fastest, easiest way to get the results you're after!
上傳時間： 2013-10-14
上傳用戶：shawvi
Abstract: Engineers often wish that radio susceptibility (RS) or radio immunity could be cured with an antibiotic, a vaccine, or someform of cure-all. Unfortunately, solving the RS problem is not that easy. Indeed, the laws of physics apply. In this article we discusssources of RS. We also offer tips and hints to protect systems, power supplies, printed circuit boards (PCBs), and electroniccomponents from radio frequency interference.
標簽： Susceptibility Radio 無線電干擾
上傳時間： 2014-12-30
上傳用戶：旗魚旗魚
為了能夠滿足基站易于選址、優(yōu)質(zhì)快速的建站要求和易維護、低成本、高可靠的運行要求，本文對以方艙來實現(xiàn)一體化結(jié)構(gòu)基站做出一番探討。從系統(tǒng)設(shè)計的觀點闡述了移動通信高性能基站天線設(shè)計的幾個關(guān)鍵問題，介紹了智能天線技術(shù)在基站中的應(yīng)用，并且用HFSS軟件仿真了一種新型的對稱陣子天線，該天線駐波比小于2的帶寬可以達到60%，具有良好的寬頻帶特性。 Abstract: In order to meet the station construction requirement of easy site selection and fast base station， and meet the operational requirement of easy maintenance， low cost and high reliability， this paper discussed the unified architecture base station using shelter. Several key problems of high performance mobile communication base station antenna were illustrated from the view of system design， the application of smart antenna in base station was also introduced. And a novel dipole antenna was simulated by using HFSS， the VSWR of the antenna is less than 2， and the bandwidth was reach to 60%. So it has good broadband properties.
標簽： 智能天線 基站 中的應(yīng)用
上傳時間： 2013-11-20
上傳用戶：linlin
針對UHF讀寫器設(shè)計中，在符合EPC Gen2標準的情況下，對標簽返回的高速數(shù)據(jù)進行正確解碼以達到正確讀取標簽的要求，提出了一種新的在ARM平臺下采用邊沿捕獲統(tǒng)計定時器數(shù)判斷數(shù)據(jù)的方法，并對FM0編碼進行解碼。與傳統(tǒng)的使用定時器定時采樣高低電平的FM0解碼方法相比，該解碼方法可以減少定時器定時誤差累積的影響；可以將捕獲定時器數(shù)中斷與數(shù)據(jù)判斷解碼相對分隔開，使得中斷對解碼影響很小，實現(xiàn)捕獲與解碼的同步。通過實驗表明，這種方法提高了解碼的效率，在160 Kb/s的接收速度下，讀取一張標簽的時間約為30次/s。 Abstract: Aiming at the requirement of receiving correctly decoded data from the tag under high-speed communication which complied with EPC Gen2 standard in the design of UHF interrogator， the article introduced a new technology for FM0 decoding which counted the timer counter to judge data by using the edge interval of signal capture based on the ARM7 platform. Compared with the traditional FM0 decoding method which used the timer timed to sample the high and low level， the method could reduce the accumulation of timing error and could relatively separate capture timer interrupt and the data judgment for decoding， so that the disruption effect on the decoding was small and realizd synchronization of capture and decoding. Testing result shows that the method improves the efficiency of decoding， at 160 Kb/s receiving speed， the time of the interrogator to read a tag is about 30 times/s.
上傳時間： 2013-11-10
上傳用戶：liufei
Multioutput monolithic regulators are easy to use and fi tinto spaces where multichip solutions cannot. Nevertheless,the popularity of multioutput regulators is temperedby a lack of options for input voltages above 30V andsupport of high output currents. The LT3692A fi lls thisgap with a dual monolithic regulator that operates frominputs up to 36V. It also includes a number of channeloptimization features that allow the LT3692A’s per-channelperformance to rival that of multichip solutions.
標簽： 492 DN 降壓 溫度監(jiān)控
上傳時間： 2014-01-03
上傳用戶：Huge_Brother
蟲蟲下載站版權(quán)所有 京ICP備2021023401號-1
