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disk-on-chip

  • tas3204

    The TAS3204 is a highly-integrated audio system-on-chip (SOC) consisting of a fully-programmable, 48-bit digital audio processor, a 3:1 stereo analog input MUX, four ADCs, four DACs, and other analog functionality. The TAS3204 is programmable with the graphical PurePath Studio? suite of DSP code development software. PurePath Studio is a highly intuitive, drag-and-drop environment that minimizes software development effort while allowing the end user to utilize the power and flexibility of the TAS3204’s digital audio processing core. TAS3204 processing capability includes speaker equalization and crossover, volume/bass/treble control, signal mixing/MUXing/splitting, delay compensation, dynamic range compression, and many other basic audio functions. Audio functions such as matrix decoding, stereo widening, surround sound virtualization and psychoacoustic bass boost are also available with either third-party or TI royalty-free algorithms. The TAS3204 contains a custom-designed, fully-programmable 135-MHz, 48-bit digital audio processor. A 76-bit accumulator ensures that the high precision necessary for quality digital audio is maintained during arithmetic operations. Four differential 102 dB DNR ADCs and four differential 105 dB DNR DACs ensure that high quality audio is maintained through the whole signal chain as well as increasing robustness against noise sources such as TDMA interference. The TAS3204 is composed of eight functional blocks: Clocking System Digital Audio Interface Analog Audio Interface Power supply Clocks, digital PLL I2C control interface 8051 MCUcontroller Audio DSP – digital audio processing 特性 Digital Audio Processor Fully Programmable With the Graphical, Drag-and-Drop PurePath Studio? Software Development Environment 135-MHz Operation 48-Bit Data Path With 76-Bit Accumulator Hardware Single-Cycle Multiplier (28 × 48)

    標簽: 3204 tas

    上傳時間: 2016-05-06

    上傳用戶:fagong

  • BTS50_datasheet

    The BTS5016SDA is a one channel high-side power switch in PG-TO252-5-11 package providing embedded protective functions. The power transistor is built by a N-channel vertical power MOSFET with charge pump. The design is based on Smart SIPMOS chip on chip technology. The BTS5016SDA has a current controlled input and offers a diagnostic feedback with load current sense and a defined fault signal in case of overload operation, overtemperature shutdown and/or short circuit shutdown.

    標簽: datasheet BTS 50

    上傳時間: 2019-03-27

    上傳用戶:guaixiaolong

  • AZ1117H

    The AZ1117 is a series of low dropout three-terminal regulators with a dropout of 1.15V at 1A output current. The AZ1117 series provides current limiting and thermal shutdown. Its circuit includes a trimmed bandgap reference to assure output voltage accuracy to be within 1% for 1.5V, 1.8V, 2.5V, 2.85V, 3.3V, 5.0V and adjustable versions or 2% for 1.2V version. Current limit is trimmed to ensure specified output current and controlled short-circuit current. On-chip thermal shutdown provides protection against any combination of overload and ambient temperature that would create excessive junction temperature.  The AZ1117 has an adjustable version, that can provide the output voltage from 1.25V to 12V with only 2 external resistors.

    標簽: 1117H 1117 AZ

    上傳時間: 2019-04-11

    上傳用戶:heaven0o0o0

  • f28xxflash燒寫插件

    第一步: 正確安裝CCS和F2812的燒寫插件。 第二步: 運行CCS,則進入CCS 開發環境。 第三步: 將GPIO目錄COPY到CCS開發環境中的myproject 目錄下; 在CCS中用projectOpen命令,加載SPI 目錄下的GPIO.pjt編譯,生成.out 文件。 第四步: 點擊CCS 中的Tools —>F28XX On-Chip Flash Programer。

    標簽: xxflash f28 28 燒寫 插件

    上傳時間: 2019-10-17

    上傳用戶:zz794447995

  • C2000CodeGenerationTools5_0_2

    第一步: 正確安裝CCS和F2812的燒寫插件。 第二步: 運行CCS,則進入CCS 開發環境。 第三步: 將GPIO目錄COPY到CCS開發環境中的myproject 目錄下; 在CCS中用projectOpen命令,加載SPI 目錄下的GPIO.pjt編譯,生成.out 文件。 第四步: 點擊CCS 中的Tools —>F28XX On-Chip Flash Programer。

    標簽: CodeGenerationTools5 2000

    上傳時間: 2019-10-17

    上傳用戶:zz794447995

  • Interference+Mitigation+Techniques

    This research work aims at eliminating the off-chip RF SAW filters from fre- quency division duplexed (FDD) receivers. In the first approach, a monolithic passive RF filter was constructed using on-chip capacitors and bondwire inductors. The bond- wire characteristics were studied in details and the effect of mutual inductive coupling between the bondwires on the filter performance was analyzed. Based on that, a bond- wire configuration was proposed to improve the frequency response of the filter. The filter was implemented in 0.18 μm CMOS process for WCDMA applications.

    標簽: Interference Mitigation Techniques

    上傳時間: 2020-05-27

    上傳用戶:shancjb

  • Electrostatic Discharge Protection

    Electrostatic discharge (ESD) is one of the most prevalent threats to the reliability of electronic components. It is an event in which a finite amount of charge is trans- ferred from one object (i.e., human body) to another (i.e., microchip). This process can result in a very high current passing through the microchip within a very short period of time, and, hence, more than 35% of chip damages can be attributed to an ESD-related event. As such, designing on-chip ESD structures to protect integrated circuits against the ESD stresses is a high priority in the semiconductor industry.

    標簽: Electrostatic Protection Discharge

    上傳時間: 2020-06-05

    上傳用戶:shancjb

  • 全數字電源設計

    數字化電源的特點:1.控制智能化它是以數字信號處理器(DSP)或微控制器(MCU)為核心,將數字電源驅動器及PWM控制器作為控制對象而構成的智能化開關電源系統。傳統的由微控制器控制的開關電源,一般只是控制電源的啟動和關斷,并非真正意義的數字電源。2.數模組件組合優化采用“整合數字電源”(Fusion Digital Power)技術,實現了開關電源中模擬組件與數字組件的優化組合。例如,功率級所用的模擬組件MOSFET驅動器,可以很方便地與數字電源控制器相連并實現各種保護及偏置電源管理,而PWM控制器也屬于數控模擬芯片。3.集成度高實現了電源系統單片集成化(Power System on Chip),將大量的分立式元器件整合到一個芯片或一組芯片中。4.控制精度高能充分發揮數字信號處理器及微控制器的優勢,使所設計的數字電源達到高技術指標。例如,其脈寬調制(PWM)分辨力可達150ps(10~12s)的水平,這是傳統開關電源所望塵莫及的。數字電源還能實現多相位控制、非線性控制、負載均流以及故障預測等功能,為研制綠色節能型開關電源提供了便利條件。5.模塊化程度高數字電源模塊化程度高,各模塊之間可以方便地實現有機融合,便于構成分布式數字電源系統,提高電源系統的可靠性。

    標簽: 全數字電源

    上傳時間: 2021-12-13

    上傳用戶:XuVshu

  • ST7789V IC規格書

     Single chip TFT-LCD Controller/Driver with On-chip Frame Memory (FM) Display Resolution: 240*RGB (H) *320(V) Frame Memory Size: 240 x 320 x 18-bit = 1,382,400 bits LCD Driver Output Circuits- Source Outputs: 240 RGB Channels- Gate Outputs: 320 Channels- Common Electrode Output Display Colors (Color Mode)- Full Color: 262K, RGB=(666) max., Idle Mode Off- Color Reduce: 8-color, RGB=(111), Idle Mode On Programmable Pixel Color Format (Color Depth) for Various Display Data input Format- 12-bit/pixel: RGB=(444)- 16-bit/pixel: RGB=(565)- 18-bit/pixel: RGB=(666) MCU Interface- Parallel 8080-series MCU Interface (8-bit, 9-bit, 16-bit & 18-bit)- 6/16/18 RGB Interface(VSYNC, HSYNC, DOTCLK, ENABLE, DB[17:0])- Serial Peripheral Interface(SPI Interface)- VSYNC Interface

    標簽: st7789v LCD

    上傳時間: 2022-03-04

    上傳用戶:

  • 基于MSP430單片機及FPGA的簡易數字示波器

    數字示波器功能強大,使用方便,但是價格相對昂貴。本文以Ti的MSP430F5529為主控器,以Altera公司的EP2C5T144C8 FPGA器件為邏輯控制部件設計數字示波器。模擬信號經程控放大、整形電路后形成方波信號送至FPGA測頻,根據頻率值選擇采用片上及片外高速AD分段采樣。FPGA控制片外AD采樣并將數據輸入到FIFO模塊中緩存,由單片機進行頻譜分析。測試表明:簡易示波器可以實現自動選檔、多采樣率采樣、高精度測頻及頻譜分析等功能。Digital oscilloscope is powerful and easy to use, but also expensive. The research group designed a low-cost digital oscilloscope, the chip of MSP430F5529 of TI is chosen as the main controller and the device of EP2C5T144C8 of Altera company is used as the logic control unit. Analog signal enter the programmable amplifier circuit, shaping circuit and other pre-processing circuit. The shaped rectangular wave signal is sent to FPGA for measure the frequency. According to the frequency value to select AD on-chip or off-chip high-speed AD for sampling. FPGA controls the off-chip AD sampling and buffers AD data by FIFO module. The single chip microcomputer receives the data, and do FFT for spectrum analysis. The test shows that the simple oscilloscope can realize automatic gain selection, sampling at different sampling rates, high precision frequency measurement and spectrum analysis.

    標簽: msp430 單片機 fpga 數字示波器

    上傳時間: 2022-03-27

    上傳用戶:

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