ANSI-dhrystone
標簽： ANSI-dhrystone
上傳時間： 2013-12-25
上傳用戶：sy_jiadeyi
The DHRY program performs the dhrystone benchmarks on the 8051. dhrystone is a general-performance benchmark test originally developed by Reinhold Weicker in 1984. This benchmark is used to measure and compare the performance of different computers or, in this case, the efficiency of the code generated for the same computer by different compilers. The test reports general performance in dhrystones per second. Like most benchmark programs, dhrystone consists of standard code and concentrates on string handling. It uses no floating-point operations. It is heavily influenced by hardware and software design, compiler and linker options, code optimizing, cache memory, wait states, and integer data types. The DHRY program is available in different targets: Simulator: Large Model: DHRY example in LARGE model for Simulation Philips 80C51MX: DHRY example in LARGE model for the Philips 80C51MC
標簽： general-performanc benchmarks dhrystone dhrystone
上傳時間： 2016-11-30
上傳用戶：hphh
Cortex-M3 是ARM 公司為要求高性能(1.25 dhrystone MIPS/MHz)、低成本、低功耗的嵌入式應用專門設計的內(nèi)核。STM32 系列產(chǎn)品得益于Cortex-M3 在架構(gòu)上進行的多項改進，包括提升性能的同時又提高了代碼密度的Thumb-2 指令集和大幅度提高中斷響應的緊耦合嵌套向量中斷控制器，所有新功能都同時具有業(yè)界最優(yōu)的功耗水平。本系統(tǒng)是基于Cortex-M3 內(nèi)核的STM32 微控制器的mp3 播放器，在硬件方面主要有VS1053硬件音頻解碼器和12864 點陣液晶屏，在軟件方面主要有VS1053 的驅(qū)動，SD 卡工作在SPI 模式下的讀寫驅(qū)動，F(xiàn)AT 文件系統(tǒng)的移植，12864 液晶的驅(qū)動，嵌入式操作系統(tǒng)ucOSii 的移植以及嵌入式圖形管理器ucGUI 的移植。整個設計過程包括電子系統(tǒng)的設計技術及調(diào)試技術，包括需求分析，原理圖的繪制，pcb 板的繪制，制版，器件采購，安裝，焊接，硬件調(diào)試，軟件模塊編寫，軟件模塊測試，系統(tǒng)整體測試等整個開發(fā)調(diào)試過程。
上傳時間： 2013-11-19
上傳用戶：shaoyun666
ARM核心是主控SOC中的重要部分，系統(tǒng)的日常應用都由ARM核心來完成，因此ARM核心的效能很大程度上跟用戶體驗有關。ARM公司一般用DMIPS/MHz來標稱ARM核心的性能。DMIPS是dhrystone Million Instructions executed Per Second的縮寫，反映核心的整數(shù)計算能力。但dhrystone算法代碼本身比較叫，可以完全放到Cache中執(zhí)行，因此反映的只是核心能力，并不能反映緩存、內(nèi)存I/O性能。
上傳時間： 2013-10-16
上傳用戶：devin_zhong
SAM9261 BasicMMU Example code with ADS1.2 (163 kB) The goal of this project is to show how to use a PC100 SDRAM and the MMU to perform a rating with a 100MHz Bus Clock. The rating is based on dhrystone 2.1. It shows the rate when I+D Caches are disabled or enabled, with or without MMU and I Cache is disable or enabled, with or without MMU.
標簽： BasicMMU Example project 9261
上傳時間： 2013-12-28
上傳用戶：zhanditian
為裸機，不帶操作系統(tǒng)的cpu，移植的dhrystone測試程序
標簽：
上傳時間： 2014-12-19
上傳用戶：baiom
Introduction ? ? The ARM Cortex -A8 microprocessor is the first applications microprocessor in ARM!ˉs new Cortex family. With high performance and power efficiency, it targets a wide variety of mobile and consumer applications including mobile phones, set-top boxes, gaming consoles and automotive navigation/entertainment systems. The Cortex-A8 processor spans a range of performance points depending on the implementation, delivering over to 2000 dhrystone MIPS (DMIPS) of performance for demanding consumer applications and consuming less than 300mW for low-power mobile devices. This translates into a large increase in processing capability while staying with the power levels of previous generations of mobile devices. Consumer applications will benefit from the reduced heat dissipation and resulting lower packaging and integration costs.
標簽： microprocessor Introduction applications Cortex
上傳時間： 2013-12-09
上傳用戶：xzt
STM32F407VET6數(shù)據(jù)手冊Core: ARM 32-bit Cortex?-M4 CPU with FPU,Adaptive real-time accelerator (ARTAccelerator?) allowing 0-wait state executionfrom Flash memory, frequency up to 168 MHz,memory protection unit, 210 DMIPS/1.25 DMIPS/MHz (dhrystone 2.1), and DSPinstructions
標簽： stm32f407vet6 數(shù)據(jù)手冊
上傳時間： 2022-07-25
上傳用戶：
