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circuit calculator

IN-CIRCUIT-DEBUGGER (ICD2) hardware using CY7C64613 (usb) and PIC16F877A for Microchip PIC

IN-CIRCUIT-DEBUGGER (ICD2) hardware using CY7C64613 (usb) and PIC16F877A for Microchip PIC

標(biāo)簽： IN-CIRCUIT-DEBUGGER PIC Microchip hardware

上傳時(shí)間： 2016-04-03

上傳用戶：sclyutian
11 completely PDF document for BASCOM 8051 demo circuit

11 completely PDF document for BASCOM 8051 demo circuit

標(biāo)簽： completely document circuit BASCOM

上傳時(shí)間： 2013-12-06

上傳用戶：siguazgb
ARM JTAG Debugger with circuit

ARM JTAG Debugger with circuit

標(biāo)簽： Debugger circuit JTAG with

上傳時(shí)間： 2016-04-15

上傳用戶：ccclll
circuit-diagram is protracted in PROTEUS

circuit-diagram is protracted in PROTEUS

標(biāo)簽： circuit-diagram protracted PROTEUS is

上傳時(shí)間： 2016-04-24

上傳用戶：huyiming139
Agilent.ADS.Using Circuit Simulators[2004-09].pdf

Agilent.ADS.Using Circuit Simulators[2004-09].pdf

標(biāo)簽： Simulators Agilent Circuit Using

上傳時(shí)間： 2016-04-28

上傳用戶：天涯
緩沖電路（Snubber Circuit）又稱(chēng)為吸收電路。其作用是抑制電力電子器件的內(nèi)因過(guò)電壓、du/dt或者過(guò)電流di/dt,減小器件的開(kāi)關(guān)損耗。緩沖電路可分為關(guān)斷緩沖電路和開(kāi)通緩沖電路。

緩沖電路（Snubber Circuit）又稱(chēng)為吸收電路。其作用是抑制電力電子器件的內(nèi)因過(guò)電壓、du/dt或者過(guò)電流di/dt,減小器件的開(kāi)關(guān)損耗。緩沖電路可分為關(guān)斷緩沖電路和開(kāi)通緩沖電路。

標(biāo)簽： Snubber Circuit 緩沖電路 dt

上傳時(shí)間： 2016-05-01

上傳用戶：cx111111
Low Power Circuit Design. hope you can get a lot from it.

Low Power Circuit Design. hope you can get a lot from it.

標(biāo)簽： Circuit Design Power hope

上傳時(shí)間： 2013-12-16

上傳用戶：fxf126@126.com
This article descrice how to use unnecessary I／O in the 51MCU to test the temperature, circuit is si

This article descrice how to use unnecessary I／O in the 51MCU to test the temperature, circuit is simple.

標(biāo)簽： temperature unnecessary the descrice

上傳時(shí)間： 2016-06-11

上傳用戶：13517191407
a simple calculator with vhdl operators performing calculator operation

a simple calculator with vhdl operators performing calculator operation

標(biāo)簽： calculator performing operators operation

上傳時(shí)間： 2013-12-19

上傳用戶：duoshen1989
VHDL code for a clock divider by 27 circuit with a resulting waveform with 50％ duty cycle..

VHDL code for a clock divider by 27 circuit with a resulting waveform with 50％ duty cycle..

標(biāo)簽： with resulting waveform circuit

上傳時(shí)間： 2014-01-05

上傳用戶：woshini123456