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can-bus

CAN是控制器局域網(wǎng)絡(luò)(ControllerAreaNetwork,CAN)的簡稱,是由以研發(fā)和生產(chǎn)汽車電子產(chǎn)品著稱的德國BOSCH公司開發(fā)的,并最終成為國際標(biāo)準(zhǔn)(ISO11898),是國際上應(yīng)用最廣泛的現(xiàn)場總線之一。在北美和西歐,CAN總線協(xié)議已經(jīng)成為汽車計(jì)算機(jī)控制系統(tǒng)和嵌入式工業(yè)控制局域網(wǎng)的標(biāo)準(zhǔn)總線,并且擁有以CAN為底層協(xié)議專為大型貨車和重工機(jī)械車輛設(shè)計(jì)的J1939協(xié)議。
  • PCA82C250 PCA82C251 CAN Transc

    The PCA82C250 and PCA82C251 are advanced transceiver products for use in automotive and general industrialapplications with transfer rates up to 1 Mbit/s. They support the differential bus signal representation beingdescribed in the international standard for in-vehicle CAN high-speed applications (ISO 11898). Controller AreaNetwork (CAN) is a serial bus protocol being primarily intended for transmission of control related data between anumber of bus nodes.

    標(biāo)簽: PCA 82C Transc 82

    上傳時(shí)間: 2013-11-24

    上傳用戶:Alick

  • PCA9541 2 to 1 I2C-bus master

    The PCA9541 is a 2-to-1 I2C-bus master selector designed for high reliability dual masterI2C-bus applications where system operation is required, even when one master fails orthe controller card is removed for maintenance. The two masters (for example, primaryand back-up) are located on separate I2C-buses that connect to the same downstreamI2C-bus slave devices. I2C-bus commands are sent by either I2C-bus master and are usedto select one master at a time. Either master at any time can gain control of the slavedevices if the other master is disabled or removed from the system. The failed master isisolated from the system and will not affect communication between the on-line masterand the slave devices on the downstream I2C-bus.

    標(biāo)簽: master C-bus 9541 PCA

    上傳時(shí)間: 2013-10-09

    上傳用戶:3294322651

  • PCA9549 Octal bus switch with

    The PCA9549 provides eight bits of high speed TTL-compatible bus switching controlledby the I2C-bus. The low ON-state resistance of the switch allows connections to be madewith minimal propagation delay. Any individual A to B channel or combination of channelscan be selected via the I2C-bus, determined by the contents of the programmable Controlregister. When the I2C-bus bit is HIGH (logic 1), the switch is on and data can flow fromPort A to Port B, or vice versa. When the I2C-bus bit is LOW (logic 0), the switch is open,creating a high-impedance state between the two ports, which stops the data flow.An active LOW reset input (RESET) allows the PCA9549 to recover from a situationwhere the I2C-bus is stuck in a LOW state. Pulling the RESET pin LOW resets the I2C-busstate machine and causes all the bits to be open, as does the internal power-on resetfunction.

    標(biāo)簽: switch Octal 9549 with

    上傳時(shí)間: 2014-11-22

    上傳用戶:xcy122677

  • PCA9546A 4 channel I2C bus swi

    The PCA9546A is a quad bidirectional translating switch controlled via the I2C-bus. TheSCL/SDA upstream pair fans out to four downstream pairs, or channels. Any individualSCx/SDx channel or combination of channels can be selected, determined by thecontents of the programmable control register.

    標(biāo)簽: channel 9546A 9546 PCA

    上傳時(shí)間: 2013-11-16

    上傳用戶:cc1915

  • PCA9555 16bit I2C-bus and SMBu

    The PCA9555 is a 24-pin CMOS device that provides 16 bits of General Purpose parallelInput/Output (GPIO) expansion for I2C-bus/SMBus applications and was developed toenhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvementsinclude higher drive capability, 5 V I/O tolerance, lower supply current, individual I/Oconfiguration, and smaller packaging. I/O expanders provide a simple solution whenadditional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc.The PCA9555 consists of two 8-bit Configuration (Input or Output selection); Input, Outputand Polarity Inversion (active HIGH or active LOW operation) registers. The systemmaster can enable the I/Os as either inputs or outputs by writing to the I/O configurationbits. The data for each Input or Output is kept in the corresponding Input or Outputregister. The polarity of the read register can be inverted with the Polarity Inversionregister. All registers can be read by the system master. Although pin-to-pin and I2C-busaddress compatible with the PCF8575, software changes are required due to theenhancements, and are discussed in Application Note AN469.

    標(biāo)簽: C-bus 9555 SMBu PCA

    上傳時(shí)間: 2013-11-13

    上傳用戶:fredguo

  • PCA9547 8 channel I2C bus mult

    The PCA9547 is an octal bidirectional translating multiplexer controlled by the I2C-bus.The SCL/SDA upstream pair fans out to eight downstream pairs, or channels. Only oneSCx/SDx channel can be selected at a time, determined by the contents of theprogrammable control register. The device powers up with Channel 0 connected, allowingimmediate communication between the master and downstream devices on that channel.

    標(biāo)簽: channel 9547 mult PCA

    上傳時(shí)間: 2014-12-28

    上傳用戶:270189020

  • PCA9548A 8 channel I2C bus swi

    The PCA9548A is an octal bidirectional translating switch controlled via the I2C-bus. TheSCL/SDA upstream pair fans out to eight downstream pairs, or channels. Any individualSCx/SDx channel or combination of channels can be selected, determined by thecontents of the programmable control register.An active LOW reset input allows the PCA9548A to recover from a situation where one ofthe downstream I2C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets theI2C-bus state machine and causes all the channels to be deselected as does the internalPower-on reset function.

    標(biāo)簽: channel 9548A 9548 PCA

    上傳時(shí)間: 2013-10-13

    上傳用戶:bakdesec

  • 8-bit I2C-bus and SMBus IO port with reset

    The PCA9557 is a silicon CMOS circuit which provides parallel input/output expansion for SMBus and I2C-bus applications. The PCA9557 consists of an 8-bit input port register, 8-bit output port register, and an I2C-bus/SMBus interface. It has low current consumption and a high-impedance open-drain output pin, IO0. The system master can enable the PCA9557’s I/O as either input or output by writing to the configuration register. The system master can also invert the PCA9557 inputs by writing to the active HIGH polarity inversion register. Finally, the system master can reset the PCA9557 in the event of a time-out by asserting a LOW in the reset input. The power-on reset puts the registers in their default state and initializes the I2C-bus/SMBus state machine. The RESET pin causes the same reset/initialization to occur without de-powering the part.

    標(biāo)簽: C-bus SMBus reset port

    上傳時(shí)間: 2014-01-18

    上傳用戶:bs2005

  • Using the P82B96 for bus inter

    The P82B96 offers many different ways in which it can be used as abus interface. In its simplest application it can be used as aninterface between bus systems operating from different supplyvoltages. Opto isolation between two bus systems is possible, andalso the availability of the Tx and Rx signals permits interfacing ofthe P82B96 with other bus systems which separate the forwardoutput path, from the backward input signal path.

    標(biāo)簽: P82B96 Using inter the

    上傳時(shí)間: 2013-10-11

    上傳用戶:洛木卓

  • This module can be used to interface to the MMC card in MMC or * SPI modes. It supports a multiple

    This module can be used to interface to the MMC card in MMC or * SPI modes. It supports a multiple card environment. The reset and * identification processes assume multiple cards on the bus. * In MMC mode, the card number is used as the RCA operand in the * commands.

    標(biāo)簽: MMC interface multiple supports

    上傳時(shí)間: 2014-01-07

    上傳用戶:qilin

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